Display controller for detecting predetermined drawing command among a plurality of drawing commands

• US 4,747,074 A
• Filed: 01/27/1987
• Issued: 05/24/1988
• Est. Priority Date: 05/13/1983
• Status: Expired due to Fees

• Current Assignee: Shigeaki Yoshida
• Original Assignee: Shigeaki Yoshida
• Inventors: Yoshida, Shigeaki
• Primary Examiner(s): Zache, Raulfe B.
• Assistant Examiner(s): Lee, Thomas C.
• Application Number:
  US07/006,963
• Time in Patent Office: 483 Days
• Field of Search: 364/200, 364/900 MS File, 364/518, 364/521, 340/724, 340/734, 340/747, 340/789, 382/10
• US Class Current: 345/522
• CPC Class Codes: G09G 5/363 Graphics controllers

Abstract

The display controller has a drawing processor for forming an address signal and a data signal to be supplied to a refreshing memory by processing a drawing command supplied thereto, and a digital comparator for comparing an address signal outputted from the drawing processor with an address signal set beforehand. An output of the digital comparator is utilized for referring to the drawing command to be processed. Thus the drawing command which produces a particular one of a plurality of graphic patterns forming a display on a display device can be extracted easily.

Claims

1. A display controller for a system having a microcomputer for generating drawing commands, a refresh memory for storing image data and a display device connected to said refresh memory for displaying said image data, said display controller comprising:

a drawing processor including a random access memory, a read only memory, an arithmetic logic unit, a register and a command decoder, said drawing processor being responsive to receipt of a plurality of drawing commands from said microcomputer for generating address signals and data signals representing image data by processing each drawing command supplied thereto and for supplying said address signals and data signals to said refresh memory, so that images are displayed on a display device on the basis of the data stored in said refresh memory; and

a digital comparator connected to said drawing processor for comparing an address signal outputted from the drawing processor with a predetermined address signal which uniquely identifies at least a portion of a single selected image corresponding to one of said plurality of drawing commands and for producing an output signal when comparison is detected; and

means responsive to said output signal of the digital comparator for detecting a single particular drawing command among said plurality of drawing commands processed by said drawing processor and for supplying an output to said microcomputer indicating the detected drawing command.

2. The display controller as defined in claim 1, wherein said predetermined address signal which is supplied to the digital comparator comprises a plurality of address signals indicating a predetermined area of the image to be formed on the display device.

3. The display controller as defined in claim 2, wherein said detecting means comprises a register connected to receive said drawing commands being supplied to said drawing processor, the output signal of the digital comparator being supplied to said register to cause a drawing command to be stored therein.

4. The display controller as defined in claim 3, comprising a one-chip monolithic semiconductor integrated circuit.

5. The display controller as defined in claim 2, comprising a one-chip monolithic semiconductor integrated circuit.

6. A display controller responsive to the receipt of a sequence of drawing commands from a drawing command generating device for storing display data in a refresh memory so that images corresponding to said drawing commands are displayed on a display device, said display controller comprising:

a drawing processor including a random access memory, a read only memory, an arithmetic logic unit, a register and a command decoder, said drawing processor being responsive to receipt of said sequentially supplied drawing commands for generating address signals and data signals by processing each drawing command supplied thereto and for supplying said address signals and data signals to said refresh memory;

means for providing an address signal which uniquely identifies at least a portion of a single selected image corresponding to one of said sequentially received drawing commands;

a digital comparator connected to said drawing processor and said address signal providing means for comparing each address signal outputted from said drawing processor with the address signal from said address signal providing means so as to produce an output signal indicating the processing by said drawing processor of the drawing command corresponding to said single selected image when comparison is detected; and

command identifying means responsive to the output signal from said digital comparator for supplying to said drawing command generating device a signal which identifies the drawing command corresponding to said single selected image.

7. A display controller as defined in claim 6, comprising a one-chip monolithic semiconductor integrated circuit.

8. A display controller as defined in claim 6, wherein said address signal providing means stores a plurality of address signals, including maximum and minimum addresses defining an area including a portion of the selected image but no other image to be formed on said display device.

9. The display controller as defined in claim 6, wherein said command identifying means includes a register connected to receive said drawing commands being supplied to said drawing processor, the output signal of the digital comparator being supplied to said register to cause a drawing command to be stored therein.