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Circuit for detecting level of input voltage

  • US 4,749,880 A
  • Filed: 08/12/1985
  • Issued: 06/07/1988
  • Est. Priority Date: 08/10/1984
  • Status: Expired due to Term
First Claim
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1. A transistor circuit comprising:

  • first and second potential terminals;

    first and second input terminals;

    first, second, third, and fourth nodes;

    a first field effect transistor of a first conductivity type connected between said first potential terminal and said first node and having a gate connected to said first input terminal;

    a second field effect transistor of said first conductivity type connected between said first potential terminal and said second node and having a gate connected to said second input terminal;

    a third field effect transistor of a second, opposite conductivity type, connected between said second potential terminal and said first node and having a gate connected to said first node;

    a fourth field effect transistor of said second conductivity type connected between said second potential terminal and said third node and having a gate connected to the gate of said third transistor;

    a fifth field effect transistor of said second conductivity type connected between said second potential terminal and said second node and having a gate connected to said second node;

    a sixth field effect transistor of said second conductivity type connected between said second potential terminal and said fourth node and having a gate connected to the gate of said fifth transistor;

    a seventh field effect transistor of said first conductivity type connected between said fourth node and said first potential terminal and having a gate connected to said fourth node;

    an eighth field effect transistor of said first conductivity type connected between said third node and said first potential terminal and having a gate connected to the gate of said seventh transistor;

    means for supplying an input voltage to one of said first and second input terminals;

    means for supplying a reference voltage to the other of said first and second input terminals;

    an output terminal coupled to said third node;

    a ninth field transistor of said first conductivity type connected in series with said first field effect transistor between said first potential terminal and said first node;

    a tenth field effect transistor of said first conductivity type connected in series with said second field effect transistor between said first potential terminal and said second node; and

    means for supplying a control signal to gates of said ninth and tenth field effect transistors, wherein said ninth and tenth field effect transistors are turned ON to enable said transistor circuit when said control signal takes a first logic level and turned OFF to disenable said transistor circuit when said control signal takes a second logic level.

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