Tracking sample and hold phase detector

• US 4,751,468 A
• Filed: 05/01/1986
• Issued: 06/14/1988
• Est. Priority Date: 05/01/1986
• Status: Expired due to Term

• Current Assignee: Tektronix Incorporated (Fortive Corp.)
• Original Assignee: Tektronix Incorporated (Fortive Corp.)
• Inventors: Agoston, Agoston
• Primary Examiner(s): Miller, Stanley D.
• Assistant Examiner(s): Callahan, Timothy P.
• Application Number:
  US06/858,428
• Time in Patent Office: 775 Days
• Field of Search: 328/133, 328/155, 328/151, 307/352, 307/353, 307/511, 307/257, 307/321
• US Class Current: 327/10
• CPC Class Codes: G01R 25/005 Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller, or for passing one of the input signals as output signal
• CPC Class Codes: G01R 25/08 by counting of standard pulses

Abstract

A tracking sample and hold phase detector operating as an error sampled feedback loop which takes signal samples during successive periods of an input signal with a sampling gate, holds the signal sample in a storage gate, and feeds back the sample to the sampling gate to allow the bias of the sampling gate to track the input signal level, thereby maintaining balance of the tracking circuit. A fast comparator detects the zero crossing level of the downconverted signal which is comprised of successive signal sample steps and has the shape of the input signal. The sampling gate comprises a diode bridge enabled by a balanced strobe, the input signal and the strobe being close or equal in frequency, the frequency of the downconverted signal being the difference frequency.

Claims

1. A phase detector circuit, comprising:

means responsive to a first periodic signal for generating a sample of a second periodic signal once during each successive period of said first periodic signal, said first and second periodic signals having substantially the same frequency;

circuit means connected to said sample generating means and including means for storing a level of said sample of said second periodic signal, said circuit means including means for disabling said sample generating means between successive samples, said disabling means including means responsive to said stored level of said sample for establishing a reference level provided to said sample generating means at which reference level said sample generating means operates for a next successive sample; and

means coupled to said circuit means for detecting a predetermined level of said sample of said second periodic signal stored in said storing means, said circuit means providing an input signal to said detecting means comprising successive ones of said level of said second periodic signal, said input signal having a frequency which is the difference between the frequencies of said first and said second periodic signals, whereby an output of said detecting means provides an indication of phase relationship between said first and second periodic signals.

2. A tracking sample and hold phase comparator, comprising:

a source of periodic reference pulses;

a diode bridge sampling gate having

an input terminal receiving a first periodic signal having a frequency substantially the same as that of said periodic references pulses,

first and second control input terminals receiving said periodic reference pulses and a bias voltage, and

an output terminal, said diode bridge sampling gate being disabled by said bias voltage applied to said control input terminals and enabled by said periodic reference pulses to generate a sample of said first periodic signal on said output terminal;

circuit means connected to said output terminal and including means for holding said sample of said first periodic signal, said circuit means including bias means for generating said bias voltage applied to said control input terminals, whereby said bias voltage tracks a level of said sample held in said circuit means; and

a level detector circuit coupled to said circuit means and receiving an input therefrom representing the level of said sample, said level detector circuit being responsive to said source of periodic reference pulses to generate an output signal when said sample of said first periodic signal is a predetermined level, whereby an output of said detecting means provides an indication of phase coincidence between said first periodic signal and said reference pulses.

3. Circuit means for detecting phase coincidence between a first periodic signal and a reference periodic signal, comprising:

means responsive to said reference periodic signal for generating a sample of said first periodic signal during successive periods of said reference periodic signal, said first periodic signal and said reference periodic signal having substantially the same frequency, said sample generating means being disabled between said samples by a bias voltage;

circuit means connected to said sampling means and including means for storing said sample of said first periodic signal, said circuit means including means for generating said bias voltage said bias voltage generating means including means for tracking a voltage level of said sample stored in said storing means; and

means coupled to said circuit means for detecting a predetermined level of said sample of said first periodic signal, said circuit means providing an input signal to said detecting means comprising successive ones of said voltage level of said sample stored in said storing means, said input signal having a frequency which is the difference between the frequencies of said first periodic signal and said reference periodic signal, whereby an output of said detecting means provides an indication of phase relationship between said first periodic signal and said reference periodic signals.

4. A phase detector circuit, comprising:

a diode bridge circuit receiving first and second periodic signals and being responsive to said first periodic signal for generating a sample of said second periodic signal once during each successive period of said first periodic signal, said first and said second periodic signals having substantially the same frequency;

circuit means connected to said diode bridge circuit and including means coupled to an output of said diode bridge circuit for storing a level of said sample of said second periodic signal, said circuit means including means for disabling said diode bridge circuit between successive samples, said disabling means including means responsive to said stored level of said sample for establishing a reference level provided to said diode bridge circuit at which reference level said diode bridge circuit operates for a next successive sample; and

means coupled to said circuit means for detecting a predetermined level of said sample of said second periodic signal stored in said storing means, said circuit means providing an input signal to said detecting means comprising successive ones of said level of said second periodic signal, said input signal having a frequency which is the difference between the frequencies of said first and said second periodic signals, whereby an output of said detecting means provides an indication of phase relationship between said first and second periodic signals.

5. The phase detector of claim 4 wherein said first periodic signal comprises a pair of balanced strobe pulses applied to said diode bridge circuit to forward bias said diode bridge.

6. The phase detector of claim 5 wherein said disabling means comprises means for reverse biasing said diode bridge.

7. A tracking sample and hold phase comparator, comprising:

a source of periodic reference pulses comprising balanced strobes;

a diode bridge sampling gate having

an input terminal receiving a first periodic signal having a frequency substantially the same as that of said periodic references pulses,

first and second control input terminals receiving said balanced strobes and a bias voltage, and

an output terminal, said diode bridge sampling gate being disabled by said bias voltage applied to said control input terminals and enabled by said balanced strobes to generate a sample of said first periodic signal on said output terminal;

circuit means connected to said output terminal and including means for holding said sample of said first periodic signal, said circuit means including bias means for generating said bias voltage applied to said control input terminals, whereby said bias voltage tracks a level of said sample held in said circuit means; and

a level detector circuit coupled to said circuit means and receiving an input therefrom representing the level of said sample, said level detector circuit being responsive to said source of periodic reference pulses to generate an output signal when said sample of said first periodic signal is as predetermined level, whereby an output of said detecting means provides an indication of phase coincidence between said first periodic signal and said reference pulses.

8. Circuit means for detecting phase coincidence between a first periodic signal and a reference periodic signal, comprising:

a diode bridge circuit receiving said reference periodic signal and responsive thereto to generate a sample of said first periodic signal during succesive periods of said reference periodic signal, said first periodic signal and said reference periodic signal having substantially the same frequency, said diode bridge circuit being disabled between said samples by a bias voltage;

circuit means connected to said diode bridge circuit and including means for storing said sample of said first periodic signal, said circuit means including means for generating said bias voltage, said bias voltage generating means including means for tracking a voltage level of said sample stored in said storing means; and

means coupled to said circuit means for detecting a predetermined level of said sample of said first periodic signal, said circuit means providing an input signal to said detecting means comprising successive ones of said voltage level of said sample stored in said storing means, said input signal having a frequency which is the difference between the frequencies of said first periodic signal and said reference periodic signal, whereby an output of said detecting means provides an indication of phase relationship between said first periodic signal and said reference periodic signal.

9. The circuit means of claim 8 wherein said reference periodic signal comprises a pair of balanced strobes applied to said diode bridge circuit to forward bias said diode bridge circuit.

10. The circuit means for claim 9 wherein said bias voltage generating means includes means for applying reverse bias to said diode bridge, said reverse bias being referenced to said voltage level of said sample stored in said storing means.