Method for fabricating a semiconductor contact and interconnect structure using orientation dependent etching and thermomigration

• US 4,761,681 A
• Filed: 09/08/1982
• Issued: 08/02/1988
• Est. Priority Date: 09/08/1982
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Reid, Lee R.
• Primary Examiner(s): James, Andrew J.
• Assistant Examiner(s): CLARK, SHEILA V
• Application Number:
  US06/415,783
• Time in Patent Office: 2,155 Days
• Field of Search: 357/55, 357/68, 357/71, 357/75
• US Class Current: 257/777
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/18 the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: Y10S 148/164 Three dimensional processing

Abstract

A method for fabricating a semiconductor device and the semiconductor device so fabricated, wherein the method includes the steps of forming a mesa upon one side of a semiconductor surface and then forming a conduction path from the mesa extending through the slice to the opposite side of the semiconductor substrate. Aluminum/silicon alloy droplets are deposited on the first side and form a liquid eutectic which extends to the opposite side by providing a thermal gradient across the slice causing thermomigration of the liquid eutectic. An electrical circuit is then formed on the opposite side and electrically connected to the metal conductor extending through the substrate as formed by the thermomigration of the liquid eutectic. A semiconductor structure is also described that includes an elevated surface upon the first side of a semiconductor substrate and an indentation in the other side, also the combination of two or more such substrates arranged in a stacked configuration. The elevated surface has an electrically conductive layer thereon which is connected to an electrically conductive material extending from the elevated surface to the indentation in the opposite side of the semiconductor substrate. At least one electrical circuit element is located on the opposite side of the semiconductor substrate and electrically connected to said conductive material upon the opposite side of the substrate.

Claims

1. A semiconductor device comprising:

a substrate of semiconductor material having first and second major surfaces;

at least one mesa of semiconductor material integral with the semiconductor material of said substrate and extending outwardly of said first major surface of said substrate to define a substantially level elevated surface spaced outwardly with respect to said first major surface of said substrate;

an electrically conductive material forming an electrically conductive path through said substrate and extending to said first and second major surfaces and through said at least one mesa to said level elevated surface thereof so as to define a continuous electrical conductor;

a first electrically conductive layer disposed on said level elevated surface of said mesa and electrically interconnected to said electrical conductor defined by said electrically conductive path through said substrate;

a second electrically conductive layer disposed on said second major surface of said substrate electrically interconnected to said electrical conductor as defined by said electrically conductive path through said substrate; and

first and second electrical circuit means respectively disposed on said first and second major surfaces of said substrate and electrically connected to said first and second electrically conductive layers respectively so as to be electrically interconnected with each other via said electrical conductor as defined by said electrically conductive path through said substrate.

2. A semiconductor device according to claim 1, wherein said continuous electrical conductor defined by said electrically conductive path through said substrate includes a metal.

3. A semiconductor device according to claim 2 wherein said metal is aluminum.

4. A semiconductor device structure comprising:

a plurality of individual substrates of semiconductor material, each of said substrates having first and second major surfaces;

each of said substrates having an indentation formed therein and opening onto said first major surface thereof;

at least one elevated surface portion of semiconductor material integral with the semiconductor material of each of said substrates and extending outwardly of said second major surface of said substrate;

each of said substrates further having an electrically conductive path provided therethrough and extending to the bottom of the indentation opening onto said first major surface and through said elevated surface portion on said second major surface, said electrically conductive path defining a continuous electrical conductor extending through each of said substrates in registration with the indentation on said first major surface and said elevated surface portion on said second major surface of each said substrate;

a first electrically conductive layer lining the bottom of the indentation and electrically interconnected to said electrical conductor as defined by said electrically conductive path through each said substrate;

a second electrically conductive layer disposed on said elevated surface portion of said second major surface of each said substrate and electrically interconnected to said electrical conductor as defined by said electrically conductive path through each said substrate;

said plurality of substrates being arranged in stacked juxtaposition with each other such that said elevated surface portion and said second electrically conductive layer disposed thereon of one substrate is respectively received within the indentation in electrical contact with said first electrically conductive layer lining the bottom of the indentation of an adjacent substrate so as to electrically interconnect the first and second major surfaces of each of the substrates in said stack with each other; and

electrical circuit means disposed on one or more major surfaces of said plurality of substrates included in said stack and electrically connected to the electrically conductive layer on the major surface corresponding thereto so as to be electrically interconnected with each other.