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Programmable logic device

  • US 4,761,768 A
  • Filed: 03/04/1985
  • Issued: 08/02/1988
  • Est. Priority Date: 03/04/1985
  • Status: Expired due to Term
First Claim
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1. In an integrated programmable logic device comprising a plurality of input lines, a plurality of product terms, a matrix of programmable cells each selectively coupling respective ones of said input lines to respective ones of said product terms, and output logic circuits coupling said product terms to device terminals, the improvement wherein:

  • said programmable cells each comprise an electrically erasable and reprogrammable floating gate transistor having a source and a drain and employing Fowler-Nordheim tunneling to achieve charge transfer between the floating gate and the transistor drain so that the transistor may be operated in either the enhancement mode or the depletion mode, whereby the transistor is either conductive or nonconductive when an interrogation signal is applied to the gate of the floating gate transistor, and a cell select transistor connected in series relation with said floating gate transistor and whose state is controlled by a respective input line signal;

    said device further comprises means for programming the floating gate transistors comprising said cells to either the enhancement mode or the depletion mode, said programming means adapted to program in parallel the cells coupled to a selected input line whose cell select transistors have been gated to the conductive state; and

    cell verification means for reading in parallel the programmed states of the respective cells coupled to a selected input line and providing a data sequence representative of respective programmed states at a device output port.

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