Interleaved digitizer array with calibrated sample timing
First Claim
1. For a digitizer system comprising an array of M digitizers each responsive to an input signal and a periodic clock signal of known frequency, where M is an integer greater than 1, and means for delaying transmission of the clock signal to each digitizer by a separate delay time corresponding to said each digitizer, each digitizer comprising means for producing a separate waveform data sequence in response to the clock signal, each data element of the separate waveform data sequence representing an instantaneous magnitude of the input signal during each period of said clock signal, a method for determining a timing error in the delay time corresponding to each digitizer, the method comprising the steps of:
- applying a sine wave signal of known frequency as the input signal to each digitizer such that the M digitizers produce M separate waveform data sequences in response to said input signal and said clock signal;
generating a single waveform data sequence in accordance with a combination of the M separate waveform data sequences, the single waveform data sequence being representative of said input signal;
generating a first sequence of complex numbers representing a frequency spectrum of the single waveform data sequence;
generating a second sequence of M complex numbers by extracting M elements representing relative magnitude peaks of the first sequence;
generating a third sequence of M complex numbers representing an inverse discrete Fourier transform of the second sequence;
generating a set of M phase angle numbers, each phase angle number representing a phase angle associated with a separate complex number of the third sequence and corresponding to a separate one of said digitizers; and
determining a sample timing error for each digitizer in accordance with the corresponding phase angle.
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Accused Products
Abstract
A digitizer system includes M digitizers, each producing a separate waveform data sequence representing a succession of instantaneous magnitudes of an input signal at sample times determined by a periodic clock signal. Transmission of the clock signal to each digitizer is delayed by a corresponding adjustable delay time so as to control the relative sample timing of the digitizers. To adjust sample timing, a sine wave signal is applied as the input signal to each digitizer such that the M digitizers produce M separate waveform data sequences in response to said input signal and the M data sequences are interleaved and windowed to form a single waveform data sequence. A first sequence of complex numbers representing a discrete Fourier transform of the single waveform data sequence is generated and then a second sequence of M complex numbers is formed from elements corresponding to relative magnitude peaks of the first sequence. A third sequence of M complex numbers is generated representing an inverse discrete Fourier transform of the second sequence and the phase angle of each number of the third sequence is computed and divided by the input signal frequency to produce a set of M numbers, each representing a timing error for a corresponding one of the M digitizers. The time delay corresponding to each digitizer is then adjusted by the amount of the timing error.
108 Citations
12 Claims
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1. For a digitizer system comprising an array of M digitizers each responsive to an input signal and a periodic clock signal of known frequency, where M is an integer greater than 1, and means for delaying transmission of the clock signal to each digitizer by a separate delay time corresponding to said each digitizer, each digitizer comprising means for producing a separate waveform data sequence in response to the clock signal, each data element of the separate waveform data sequence representing an instantaneous magnitude of the input signal during each period of said clock signal, a method for determining a timing error in the delay time corresponding to each digitizer, the method comprising the steps of:
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applying a sine wave signal of known frequency as the input signal to each digitizer such that the M digitizers produce M separate waveform data sequences in response to said input signal and said clock signal; generating a single waveform data sequence in accordance with a combination of the M separate waveform data sequences, the single waveform data sequence being representative of said input signal; generating a first sequence of complex numbers representing a frequency spectrum of the single waveform data sequence; generating a second sequence of M complex numbers by extracting M elements representing relative magnitude peaks of the first sequence; generating a third sequence of M complex numbers representing an inverse discrete Fourier transform of the second sequence; generating a set of M phase angle numbers, each phase angle number representing a phase angle associated with a separate complex number of the third sequence and corresponding to a separate one of said digitizers; and determining a sample timing error for each digitizer in accordance with the corresponding phase angle. - View Dependent Claims (2, 3, 4, 5, 6)
- 5. The method in accordance with claim 3 wherein said clock signal has a frequency fs and said sine wave signal has a frequency fo satisfying the expression
- space="preserve" listing-type="equation">f.sub.o =(f.sub.s /2)-(f.sub.s /4M).
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6. The method in accordance with claim 1 wherein the step of determining a sample timing error for each digitizer in accordance with the corresponding phase angle comprises the substep of dividing the corresponding phase angle by an amount proportional to the frequency of said input signal.
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7. For a digitizer system comprising an array of M digitizers each responsive to an input signal and a periodic clock signal of known frequency fs, where M is an integer greater than 1, and means for delaying transmission of the clock signal to each digitizer by a separate delay time corresponding to said each digitizer, each digitizer comprising means for producing a separate waveform data sequence in response to the clock signal, each data element of the separate waveform data sequence representing an instantaneous magnitude of the input signal during each period of said clock signal, a method for determining a timing error in the delay time corresponding to each digitizer, the method comprising the steps of:
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applying a sine wave signal of known frequency fo as the input signal to each digitizer such that the M digitizers produce M separate waveform data sequences in response to said input signal and said clock signal, where fo satisfies the expression fo =(fs /n)-(fs /4M) where n is selected from among the set of all integers greater than 1; interleaving elements of the M data sequences to form a single interleaved data sequence representative of said input signal; windowing the interleaved data sequence to form a windowed waveform data sequence; generating a first sequence of complex numbers representing a discrete Fourier transform of the single waveform data sequence; generating a second sequence of M complex numbers comprising M elements of said first sequence corresponding to relative magnitude peaks of the first sequence; generating a third sequence of M complex numbers representing an inverse discrete Fourier transform of the second sequence; generating a set of M phase angle numbers, each phase angle number representing a phase angle associated with a separate complex number of the third sequence and corresponding to a separate one of said digitizers; and determining a sample timing error for each digitizer in accordance with the corresponding phase angle number. - View Dependent Claims (8, 9)
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9. The method in accordance with claim 7 wherein the step of determining a sample timing error for each digitizer in accordance with the corresponding phase angle number comprises the substep of dividing the corresponding phase angle number by an amount proportional to the frequency of said input signal.
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10. A self-calibrating digitizer system comprising:
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an array of M digitizers each responsive to an input signal and a periodic clock signal of known frequency, where M is an integer greater than 1, each digitizer comprising means for producing a separate waveform data sequence in response to the clock signal, each data element of the separate waveform data sequence representing an instantaneous magnitude of the input signal during each period of said clock signal; means for delaying transmission of the clock signal to each digitizer by an adjustable delay time corresponding to said each digitizer; means for generating a sine wave signal of known frequency for application as the input signal to each digitizer such that the M digitizers produce M separate waveform data sequences in response to said input signal and said clock signal; and means responsive to said M separate waveform data sequences for generating a single waveform data sequence in accordance with a combination of said M separate waveform data sequences, the single waveform data sequence being representative of said input signal, for generating a first sequence of complex numbers representing a frequency spectrum of the single waveform data sequence, for generating a second sequence of complex numbers by extracting M elements representing relative magnitude peaks of the first sequence, for generating a third sequence of M complex numbers in accordance with an inverse discrete Fourier transform of the second sequence, for generating a set of M phase angle numbers, each phase angle number representing a phase angle associated with a separate complex number of the third sequence and corresponding to a separate one of said digitizers, for determining a timing error corresponding to each digitizer in accordance with the corresponding phase angle number, and for adjusting the adjustable delay time corresponding to each digitizer in accordance with the timing error corresponding to each digitizer.
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11. A self-calibrating digitizer system comprising:
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an array of M digitizers each responsive to an input signal and a periodic clock signal of known frequency fs, where M is an integer greater than 1, each digitizer comprising means for producing a separate waveform data sequence in response to the clock signal, each data element of the separate waveform data sequence representing an instantaneous magnitude of the input signal during each period of said clock signal; means for delaying transmission of the clock signal to each digitizer by a corresponding delay time; means for generating a sine wave signal of known frequency fo as the input signal to each digitizer such that the M digitizers produce M separate waveform data sequences in response to said input signal and said clock signal, where fo satisfies the expression fo =(fs /n)-(fs /4M) with n is selected from among the set of all integers greater than 2; and means for interleaving elements of the M data sequences to form a single interleaved data sequence representative of said input signal, for windowing the interleaved data sequence to form a windowed waveform data sequence, for generating a first sequence of complex numbers representing a discrete Fourier transform of the single waveform data sequence, for generating a second sequence of M complex numbers by extracting M elements representing relative magnitude peaks of the first sequence, for generating a third sequence of M complex numbers representing an inverse discrete Fourier transform of the second sequence, for generating a set of M phase angle numbers, each phase angle number representing a phase angle associated with a separate complex number of the third sequence and corresponding to a separate one of said digitizers, for determining a timing error for each digitizer in accordance with the corresponding phase angle number, and for adjusting the adjustable delay time corresponding to each digitizer in accordance with the corresponding timing error. - View Dependent Claims (12)
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Specification