Semiconductor device and process for producing the same

• US 4,764,804 A
• Filed: 02/17/1987
• Issued: 08/16/1988
• Est. Priority Date: 02/21/1986
• Status: Expired due to Term

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Otsuka, Kanji, Ishida, Hisashi, Sahara, Kunizo
• Primary Examiner(s): BELIVEAU, SCOTT E
• Application Number:
  US07/015,019
• Time in Patent Office: 546 Days
• Field of Search: 357/81, 174/16 HS, 361/386, 361/387, 361/388, 437/209, 437/210, 437/211, 437/212, 437/213, 437/214, 437/215, 437/216, 437/217, 437/218, 437/219, 437/220, 437/221, 437/222, 437/223, 437/224
• US Class Current: 257/717
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/06102 the bonding areas being at different heights
• CPC Class Codes: H01L 2224/1403 Bump connectors having different sizes, e.g. different diameters, heights or widths
• CPC Class Codes: H01L 2224/14515 Bump connectors having different functions
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/1703 Bump connectors having different sizes, e.g. different diameters, heights or widths
• CPC Class Codes: H01L 2224/17051 Bump connectors having different shapes
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 23/24 solid or gel at the normal operating temperature of the device H01L23/3135 takes precedence
• CPC Class Codes: H01L 23/3732 Diamonds
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 25/072 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/1517 : Multilayer substrate
• CPC Class Codes: H01L 2924/1532 : the connection portion being formed on the die mounting surface of the substrate
• CPC Class Codes: H01L 2924/16152 : Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]

Abstract

A semiconductor device having improved heat-dissipating characteristics employs a thin insulator film made of diamond, which has excellent thermal conductivity, as an insulator film which is formed on a chip immediately below a heat-dissipating bump electrode. Since the thin diamond film has excellent insulating properties and high thermal conductivity, it is possible to improve heat-dissipating characteristics of even a high-power semiconductor device such as a multichip module. In the case of, particularly, a multichip module, the insulation between a mother chip and a child chip can also be ensured by the presence of the thin diamond film.

Claims

1. A semiconductor device comprising:

a semiconductor substrate having a semiconductor element formed in a semiconductor active region;

a multilayer wiring structure comprised of an insulator film and an electrically conductive electric wiring which are stacked one upon the other on the surface of said semiconductor substrate;

a bump electrode for transferring an electric signal which is electrically connected to said electric wiring in said multilayer wiring structure; and

a bump electrode for heat dissipation formed on the surface of said multilayer wiring structure through a thin diamond film as a ground layer.

2. A semiconductor device comprising:

a semiconductor chip having at least a semiconductor substrate having a semiconductor element formed in a semiconductor active region, a multilayer wiring structure comprised of an insulator film and an electrically conductive electric wiring which are stacked one upon the other on the surface of said semiconductor substrate, a bump electrode for transferring an electric signal which is electrically connected to said electric wiring in said multilayer wiring structure, and a bump electrode for heat dissipation formed on the surface of said multilayer wiring structure through a thin diamond film as a ground layer; and

a mother chip having an electric wiring region formed in a semiconductor employed as a substrate material, a bump electrode for transfering an electric signal which is electrically connected to said electric wiring region, and a bump electrode for heat dissipation which is formed on the surface of said electric wiring region through a thin diamond film as a ground layer,

the respective bump electrodes of said semiconductor chip and said mother chip being welded together.

3. A semiconductor device comprising:

a semiconductor chip having at least a semiconductor substrate having a semiconductor element formed in a semiconductor active region, a multilayer wiring structure comprised of an insulator film and an electrically conductive electric wiring which are stacked one upon the other on the surface of said semiconductor substrate, a bump electrode for transferring an electric signal which is electrically connected to said electric wiring in said multilayer wiring structure, and a bump electrode for heat dissipation formed on the surface of said multilayer wiring structure through a thin diamond film as a ground layer; and

a mother chip having a semiconductor element with a circuit function provided on a semiconductor substrate, an electric wiring region provided on the surface of said substrate, a pad electrode which is electrically connected to said electric wiring region and to which an external lead is secured, a bump electrode for transferring an electric signal which is electrically connected to said electric wiring region, and a bump electrode for heat dissipation which is formed on the surface of said electric wiring region through a thin diamond film as a ground layer,

the respective bump electrodes of said semiconductor chip and said mother chip being welded together.

4. A semiconductor device comprising:

a semiconductor chip having at least a semiconductor substrate having a semiconductor element formed in a semiconductor active region, a multilayer wiring structure comprised of an insulator film and an electrically conductive electric wiring which are stacked one upon the other on the surface of said semiconductor substrate, a bump electrode for transferring an electric signal which is electrically connected to said electric wiring in said multilayer wiring structure, and a bump electrode for heat dissipation formed on the surface of said multilayer wiring structure through a thin diamond film as a ground layer;

a mother chip having an electric wiring region formed on a semiconductor employed as a substrate material, a bump electrode for transferring an electric signal which is electrically connected to said electric wiring region, and a bump electrode for heat dissipation which is formed on the surface of said electric wiring region through a thin diamond film as a ground layer;

a board and cap for a package;

an external lead electrically connected to said electric wiring on said mother chip; and

a heat-dissipating fin rigidly secured to said package board,

the respective bump electrodes of said semiconductor chip and said mother chip being welded together in one unit which is secured to said package board and hermetically sealed by said package cap.

5. A process for producing a semiconductor device, comprising the steps of:

preparing a mother chip having an electric wiring region formed on a semiconductor employed as a substrate material, a bump electrode for transferring an electric signal which is electrically connected to said electric wiring region, and a bump electrode for heat dissipation which is formed on the surface of said electric wiring region through a thin diamond film as a ground layer, and a semiconductor chip having at least a semiconductor substrate having a semiconductor element formed in a semiconductor active region, a multilayer wiring structure composed of an insulator film and an electrically conductive electric wiring which are stacked one upon the other on the surface of said semiconductor substrate, a bump electrode for transferring an electric signal which is electrically connected to said electric wiring in said multilayer wiring structure, and a bump electrode for heat dissipation formed on the surface of said multilayer wiring structure through a thin diamond film as a ground layer, the respective bump electrodes of said semiconductor chip and said mother chip being welded together in one unit;

rigidly securing said mother chip to which is secured said semiconductor chip to a board of a package, and securing an external lead to said electric wiring region on said mother chip;

hermetically sealing said mother chip, having said semiconductor chip secured thereto, with a cap for the package; and

rigidly securing a heat-dissipating fin to said package board.