Apparatus for processing image

• US 4,768,095 A
• Filed: 02/02/1987
• Issued: 08/30/1988
• Est. Priority Date: 06/26/1985
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Ishii, Yoshinori, Wada, Ryukichi
• Primary Examiner(s): Britton, Howard W.
• Assistant Examiner(s): Kostak, Victor R.
• Application Number:
  US07/026,850
• Time in Patent Office: 575 Days
• Field of Search: 358/183, 358/22, 358/160, 340/723
• US Class Current: 348/565
• CPC Class Codes: H04N 5/4448 for frame-grabbing
• CPC Class Codes: H04N 5/45 Picture in picture , e.g. displaying simultaneously another television channel in a region of the screen

Abstract

A method and apparatus for a TV receiver in which a frame of TV image signals is stored in the image memory and then read out for display as a still picture. In order to display both still picture and subsequent motion pictures, the image signals sampled with the number of pixels corresponding to the number of addresses in a specified area of the image memory are written in the process of reading out all the addresses of the image memory.

Claims

1. Apparatus for processing an image of the type having an image memory and a display device for display the signal read out of said image memory, which comprises:

sampling means having a first sampling mode in which an image signal is sampled with the number of pixels corresponding to the number of all the addresses of said image memory and a second sampling mode in which an image signal is sampled with the number of pixels corresponding to the number of addresses in a specified area of said image memory;

first addressing means for designating all the addresses of said image memory;

second addressing means for designating the addresses in said specified area of said image memory;

control means for controlling said sampling means, first and second addressing means, and image memory, said control means adapted to set said sampling means in said first sampling mode and said image memory in the write mode and make said first addressing means designate all the addresses of said image memory for writing an image to provide a still picture, and then set said sampling means in the second sampling mode and make said second addressing means sequentially write said signal sampled to said specified area of said image memory to provide a motion picture, while it is adapted to set said image memory in the readout mode in the period other than said motion picture writing period and put said first addressing means in operation to read all the image memory contents including both still and motion pictures for display in said display device.

2. Apparatus for processing an image according to claim 1, wherein said first and second addressing means designate addresses in synchronism with the sampling period of said first and second sampling modes, respectively.

3. Apparatus for processing an image according to claim 1, wherein said first addressing means completes designating all the addresses in said second sampling mode before said second addressing means completes designating the addresses in said specified area.

4. Apparatus for processing an image according to claim 1, wherein said sampling means consists of an A/D converter.

5. Apparatus for processing an image of the type having an image memory and a display device for display the signal read out of said image memory, which comprises:

sampling means having a first sampling mode in which an image signal is sampled with the number of pixels corresponding to the number of all the addresses of said image memory and a second sampling mode in which an image signal is sampled with the number of pixels corresponding to the number of addresses in a specified area of said image memory;

first addressing means for designating all the addresses of said image memory;

second addressing means for designating the addresses in said specified area of said image memory;

shift register means for processing the pixel data read out of said image memory and sending its output to said display device; and

control means for controlling said sampling means, first and second addressing means, and image memory, said control means adapted to set said sampling means in said first sampling mode and said image memory in the write mode and make said first addressing means designate all the addresses of said image memory for writing an image to provide a still picture, and then set said sampling means in the second sampling mode and make said second addressing means sequentially write said signal sampled to said specified area of said image memory to provide a motion picture, while it is adapted to set said image memory in the readout mode in the period other than said motion picture writing period and put said first addressing means in operation to read all the image memory contents including both still and motion pictures and make said shift register means eliminate the data absent area contained in said pixel data during said motion picture writing period for display in said display device.