Unpredictable bit stream generator

• US 4,769,777 A
• Filed: 06/25/1986
• Issued: 09/06/1988
• Est. Priority Date: 06/25/1986
• Status: Expired due to Fees

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Yun, Paul M., Kleidermacher, Moishe, McGrogan, Ellwood P., Bittle, William D.
• Primary Examiner(s): Harkcom, Gary V.
• Assistant Examiner(s): Nguyen, Long Thanh
• Application Number:
  US06/878,254
• Time in Patent Office: 804 Days
• Field of Search: 364/717, 364/410, 364/412
• US Class Current: 708/251
• CPC Class Codes: H03K 3/84 Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators

Abstract

An apparatus for breaking the periodicity of the pseudorandom bit stream output from a linear sequence generator. The apparatus includes a ring oscillator which periodically corrupts the sequence of the generator. The level of the supply voltage applied to the logic elements of the ring oscillator is varied over time, thereby altering the oscillator output frequency. In a second embodiment, the temperature of the logic elements of the ring oscillator is varied over time, thereby also altering the oscillator output frequency. A system comprising four of the above-disclosed apparatus having different linear sequences and different corrupting influences, are multiplexed, wherein the multiplexing selection criterion is determined by a logical combination of the four linear sequences.

Claims

1. An apparatus for generating an unpredictable stream of digital data, said apparatus comprising:

an oscillator including an odd-numbered plurality of digital logic inverter circuits coupled in series to form an endless ring, each of said inverter circuits having a propagation delay time, said oscillator providing an oscillating digital output signal having frequency determined by the number of inverter circuits and by said propagation delay time of said inverter circuits, said propagation delay times being affected by external influences on said inverter circuits;

a first sequence generator coupled to said oscillator for generating sequences of digital data, said sequences being corrupted by variations in said frequency of said oscillator output signal; and

altering means coupled to said oscillator for time-variably altering at least one of said external influences to thereby alter said frequency of said oscillator at times after completion of initial turn-on.

2. The apparatus according to claim 1 wherein said propagation delay times through said inverter circuits are affected by a supply voltage applied to said inverter circuits, said altering means including means for varying said supply voltage applied to said inverters.

3. The apparatus according to claim 2 wherein said altering means further includes a second sequence generator for generating a digital output signal, said second sequence generator being coupled to said supply voltage varying means for selecting between a first and a second magnitude of said supply voltage to be applied to said inverters in accordance with said digital output signal of said second sequence generator.

4. The apparatus according to claim 1 wherein said propagation delay times of said inverter circuits are affected by the temperature of said inverter circuits, and wherein said altering means includes a heater resistor in close proximity to at least one of said inverters, and wherein said altering means further includes a second sequence generator for generating a digital output signal, said second sequence generator being coupled to said heater resistor for enabling current flow through said heater resistor in accordance with said digital output signal of said second sequence generator.

5. The apparatus according to claim 4 wherein said altering means further includes a second resistor coupled to said second sequence generator for enabling current flow through said second resistor, said second resistor being in close proximity to at least one other of said inverters.

6. An apparatus for generating an unpredictable stream of digital data, said apparatus comprising:

an oscillator including an odd-numbered plurality of digital logic inverter circuits coupled in series to form an endless ring, each of said inverter circuits having a propagation delay time, said oscillator providing an oscillating digital output signal having frequency determined by the number of inverter circuits and by said propagation delay times of said inverter circuits, said propagation delay times being affected by external influences on said inverter circuits;

source means for providing a clocking signal;

reclocking means coupled to said oscillator and responsive to said clocking signal for providing samples of said oscillator output signal;

a first sequence generator coupled to said reclocking means for generating sequences of digital data, said sequences being corrupted by variations in said samples of said oscillator output signal; and

altering means coupled to said oscillator for time-variably altering at least one of said external influences for altering the frequency of said oscillator at times after completion of initial turn-on.

7. An apparatus according to claim 6 wherein a supply voltage having a magnitude is supplied to at least one of said inverter circuits, and said propagation delay times of said inverter circuits are affected by said magnitude of said supply voltage applied to said inverter circuits, said altering means including supply voltage varying means for varying said magnitude of said supply voltage applied to said inverters as a function of time.

8. An apparatus according to claim 7 wherein said altering means further includes a second sequence generator for generating a digital output signal, said second sequences generator being coupled to said supply voltage varying means for selecting between a first and a second magnitude of said supply voltage to be applied to said inverters in accordance with said digital output signal of said second sequence generator.

9. An apparatus according to claim 6 wherein said propagation delay times of said inverter circuits are affected by the temperature of said inverter circuits, and said altering means includes a first heater resistor in close proximity to at least one of said inverters, and wherein said altering means further includes a second sequence generator for generating a digital output signal, said second sequence generator being coupled to said first heater resistor for enabling current flow through said first heater resistor in accordance with said digital output signal of said second sequence generator.

10. An apparatus according to claim 9 wherein said altering means further includes a second heater resistor coupled to said second sequence generator for enabling current flow therethrough, said second heater resistor being in close proximity to at least one other of said inverters.

11. An apparatus according to claim 6 wherein said reclocking means includes a D-type flip-flop including clock and data input terminals and responsive at said data input terminal to said oscillator output signal and at said clock input terminal to said clocking signal.

12. An apparatus according to claim 11 wherein the frequency of said oscillator output signal is several times greater than the frequency of said clocking signal.

13. A system for generating an unpredictable stream of digital data, said system comprising:

source means for providing a clocking signal;

a plurality of apparatus for generating an unpredictable stream of digital data bits, each one of said apparatus comprising;

(a) an oscillator including an odd-numbered plurality of digital logic inverter circuits coupled in series to form an endless ring, each of said inverter circuits having a propagation delay time, said oscillator providing an oscillating digital output signal having frequency determined by the number of inverter circuits and by said propagation delay times of said inverter circuits, said propa-gation delay times being affected by external influences on said inverter circuits;

(b) reclocking means coupled to said oscillator and responsive to said clocking signal for providing reclocked samples of said oscillator signal;

(c) a first sequence generator coupled to said reclocking means for generating sequences of digital data, said sequences being corrupted by variations in said reclocked samples of said oscillator signal; and

(d) frequency altering means coupled to said oscillator for time-variably altering the frequency of said oscillator at a time after completion of initial turn-on; and

said system further comprising a single combining means having a plurality of input terminals and an output terminal, said combining means being coupled at said input terminals to said respective plurality of first sequence generators, for providing at said output terminal a stream of digital data which is an unpredictable selection of one of said plurality of sequences of digital data generated by said plurality of first sequence generators.

14. A system according to claim 13 wherein a supply voltage having a magnitude is applied to said inverter circuits for energization, and said propagation delay times of said inverter circuits are affected by said magnitude of said supply voltage applied to said inverter circuits, said frequency altering means including supply voltage varying means for varying said magnitude of said supply voltage applied to said inverters.

15. A system according to claim 14 wherein said frequency altering means further includes further sequence generating means for generating a digital output signal, said further sequence generating means being coupled to said supply voltage varying means for selecting between a first and a second magnitude of said supply voltage to be applied to said inverters in accordance with said digital output signal of said further sequence generating means.

16. A system according to claim 13 wherein said frequency altering means of at least one of said plurality of apparatus further includes a further sequence generating means for generating a digital output signal, said further sequence generating means being coupled to said first heater resistor for enabling current flow through said first heater resistor in accordance with said digital output signal of said further sequence generating means.

17. A system according to claim 16 wherein said frequency altering means of said at least one of said plurality of apparatus further includes a second resistor coupled to said further sequence generating means, said second resistor being in close proximity to at least one other of said inverters.

18. A system according to claim 13 wherein each oscillator of said plurality of apparatus includes a unique number of inverter circuits.

19. A system according to claim 18 wherein said reclocking means of each of said plurality of apparatus includes a D-type flip-flop including data and clock input terminals, and responsive at said data input terminal to said oscillating digital output signal and at said clock input terminal to said clocking signal.

20. A system according to claim 19 wherein said frequencies of said oscillating digital output signals of said oscillators of said plurality of apparatus are all several times greater than the frequency of said clocking signal.

21. A system according to claim 13 wherein said plurality of apparatus for generating an unpredictable stream of digital data bits includes four of said apparatus.