Dynamic address assignment system

• US 4,773,005 A
• Filed: 09/17/1987
• Issued: 09/20/1988
• Est. Priority Date: 09/07/1984
• Status: Expired due to Fees

• Current Assignee: Tektronix Incorporated (Fortive Corp.)
• Original Assignee: Tektronix Incorporated (Fortive Corp.)
• Inventors: Sullivan, James P.
• Primary Examiner(s): Harkcom, Gary V.
• Assistant Examiner(s): Anderson, Lawrence E.
• Application Number:
  US07/098,759
• Time in Patent Office: 369 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 340/825.08
• US Class Current: 710/9
• CPC Class Codes: G06F 12/0661 and decentralised selection
• CPC Class Codes: H04L 61/5038 for local use, e.g. in LAN or USB networks, or in a controller area network [CAN]

Abstract

For a computer system having peripheral devices coupled to a common bus through interface devices transmitting and receiving messages containing an address code matching a stored address code, a dynamic address assignment system stores a unique address code in each interface device following system startup. On system start up each interface device stores a type number and an adjustable serial number, type numbers for peripheral devices of the same type being identical while serial numbers for all peripheral devices of the same type are adjusted to different values. A master controller transmits to all peripheral devices a series of universally addressed count commands. Each interface device counts the count commands and, when the count reaches a poll number determined by the unique combination of stored type and serial numbers, requests and obtains a unique address code from the host computer. The interface device thereafter stores and uses the unique address code in transmitting and receiving messages on the bus.

Claims

1. A computer system comprising:

a bus;

a programmable host computer adapted to access said bus for purposes of sending and receiving messages and addresses thereon, said host computer programmed to transmit on said bus a sequence of COUNT messages each accompanied by a universal address, to receive REQUEST messages transmitted on said bus, and to transmit on said bus an ASSIGN message accompanied by said universal address in response to each received REQUEST message, each ASSIGN message conveying a unique device address such that the device address conveyed by each ASSIGN message differs from the device address conveyed by every other ASSIGN message; and

a plurality of programmable peripheral devices, each adapted to access said bus for purposes of sending and receiving messages and addresses thereon, said host computer programmed to transmit on said bus and each peripheral device including memory means for storing a device address and for storing a poll number, the poll numer stored in each memory means differing from the poll number stored in every other memory means, each peripheral device being programmed to receive messages transmitted on said bus by said host computer including messages accompanied by an address matching the device address stored in said memory means and to receive said COUNT and ASSIGN messages accompanied by said universal address, to maintain a count of the number of COUNT messages received, to compare the count with the poll number stored in said memory means, to transmit a REQUEST message to said host computer when the count reaches a value determined according to said poll number, and to store in said memory means the device address conveyed by the first ASSIGN message received after transmitting said REQUEST message to the host computer, wherein the poll number stored in said memory means included in each peripheral device incudes a first portion indicating the nature of the peripheral device, and a manually adjustable second portion of value such that memory means included in all peripheral devices of similar nature store poll numbers having similar first portions and dissimilar second portions, and such that all memory means included in dissimilar peripheral devices of dissimilar nature store poll numbers having dissimilar first portions, and wherein each said REQUEST message transmitted by each peripheral device conveys data indicating the nature of the peripheral device according to the first portion of the poll number stored in the memory means included in the peripheral device.

2. The computer system according to claim 1 wherein said memory means included in at least one of said plurality of peripheral devices comprises a read only memory for storing said first portion of said poll number.

3. The method according to claim 1 wherein said memory means included in at least one of said plurality of peripheral devices comprises manually operable switch means having multiple switching states, each switching state providing signals representing a different value of said second portion of said poll number.

4. For a computer system of the type having a plurality of peripheral devices and a host computer connected to a common bus, said host computer including first memory means and adapted to carry out instructions stored in said first memory means and to transmit messages and addresses over said bus, each peripheral device including second memory means and processing means, said processing means adapted to carry out instructions stored in said second memory means, to receive messages transmitted over said bus by said host computer including messages accompanied by an address matching a device address stored in said second memory means and messages accompanied by a universal address, and to transmit messages to said host computer over said bus, a method permitting said host computer to determine the nature of each peripheral device and to provide device addresses for storage in said second memory means included in said peripheral devices, the method comprising the steps of:

storing a poll number in said second memory means included in each peripheral device, the poll number including a first portion indicating the nature of the peripheral device and a manually adjustable second portion of value such that all peripheral devices of similar nature store in their second memory means poll numbers having a similar first portions and dissimilar second portions, and such that peripheral devices of dissimilar nature store in their second memory means poll numbers having dissimilar first portions;

storing instructions in said first memory means for causing said host computer to transmit a sequence of COUNT messages over said bus, each COUNT message accompanied by said universal address so that each COUNT message is received by each peripheral device processing means;

storing instructions in said second memory means of each peripheral device for causing the processing means of the peripheral device to maintain a count of the number of COUNT messages received from said host computer, to compare the count with the poll number stored in the second memory means included in said peripheral device, and to transmit a REQUEST message to said host computer when the count reaches a value determined according to said poll number, each said REQUEST message conveying data indicating the nature of said each peripheral device according to the first portion of the poll number stored in the second memory means of the peripheral device;

storing instructions in said first memory means for causing said host computer to transmit on said bus an ASSIGN message in response to each REQUEST message, each ASSIGN message conveying a different device address and accompanied by said universal address so that each ASSIGN message is received by each peripheral device processing means; and

storing instructions in said second memory means of each peripheral device for causing the processing means of said peripheral device, in response to a first ASSIGN message received after transmitting a REQUEST message to the host computer, to store the device address conveyed by said first ASSIGN message in the second memory means included in the peripheral device.

5. The method according to claim 4 wherein the second memory means included in at least one of said plurality of peripheral devices comprises a read only memory, and wherein the step of storing a poll number in said second memory means comprises the substep of storing said poll number in said read only memory.

6. The method according to claim 5 wherein said memory means included in said at least one of said plurality of peripheral devices further comprises register means for storing a number and manually operable switch means having multiple switching states, each switching state representing a different quantity, and wherein the step of storing said poll number in said second memory means of the at least one peripheral device comprises the substeps of:

manually operating said switch means so as to place said switch means in a particular switching state; and

storing instructions in said read only memory for causing the processing means of said at least one of said plurality of peripheral devices to determine the second portion of said poll number according to said quantity represented by the switching state of said switch means and to store said second portion of said poll number in said register means.