Apparatus for mounting a semiconductor chip and making electrical connections thereto

• US 4,774,630 A
• Filed: 09/30/1985
• Issued: 09/27/1988
• Est. Priority Date: 09/30/1985
• Status: Expired due to Fees

• Current Assignee: MCNC, Inc.
• Original Assignee: Micron Electronics LLC (Micron Technology, Inc.)
• Inventors: Hwang, Lih-Tyng, Narayan, Jagdish, Reisman, Arnold, Osburn, Carlton M.
• Primary Examiner(s): Pellinen, A. D.
• Assistant Examiner(s): Jennings, Derek S.
• Application Number:
  US06/781,981
• Time in Patent Office: 1,093 Days
• Field of Search: 361/381, 361/382, 361/383, 361/386, 361/388, 361/389, 357/80, 357/81, 357/82, 174/16 HS, 165/80.3, 165/80.4
• US Class Current: 361/718
• CPC Class Codes: G02B 6/42 Coupling light guides with opto-electronic elements
• CPC Class Codes: H01L 23/473 by flowing liquids H01L23/4332, H01L23/4338 take precedence
• CPC Class Codes: H01L 23/498 Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers shape of the substrate H01L23/13
• CPC Class Codes: H01L 24/80 Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01057 Lanthanum [La]
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding
• CPC Class Codes: H05K 7/1061 co-operating by abutting

Abstract

Apparatus for mounting a semiconductor device chip and making electrical connections thereto is disclosed. A semiconductor device chip has its backside connected to the surface of a substrate, and its upper surface includes a plurality of electrical pads across the entire surface thereof. A translator chip having a plurality of first electrical contacts disposed generally across the interior portion thereof are in electrical contact with the semiconductor device chip electrical pads, and a plurality of second electrical contacts disposed generally around the perimeter of the translator chip are electrically connected with the electrical terminals in the substrate to which the chip is attached. Heat may be removed from the semiconductor device chip through its backside via cooling channels in the substrate.

Claims

1. Apparatus for mounting a semiconductor device chip and making electrical connections thereto, said apparatus comprising:

a substrate having a surface including electrical terminals thereon;

a semiconductor device chip having a first surface in contact with the surface of the substrate and a second surface having a plurality of electrical pads disposed across the surface thereof, including interior surface portions inboard of the perimeter surface portions of the semiconductor device chip; and

means electrically connecting the substrate electrical terminals and the semiconductor device chip electricl pads, the means including a surface having a plurality of first electrical contacts disposed generally across the interior portion thereof making aerial electrical and physical contact with the semiconductor device chip electrical pads, including those interior pads disposed inboard of the perimeter surface portions of the semiconductor device chip, and a plurality of second electrical contacts disposed generally around the perimeter of the surface of the means electrically connecting and being in physical and electrical contact with he substrate electrical terminals, the first and second electrical contacts of the means being electrically connected in a predetermined circuit.

2. The apparatus of claim 1 wherein the semiconductor deice chip is a flip chip structure.

3. The apparatus of claim 1 wherein the substrate comprises a material having thermal conductive capability and the semiconductor device chip is in a thermally conducting relation therewith.

4. The apparatus of claim 3 wherein the substrate includes means for removing heat therefrom so that the substrate is a heat sink for removing heat from the semiconductor device chip.

5. The apparatus of claim 1 wherein the substrate surface defines a well for receiving a semiconductor device chip, and wherein the electrical terminals are disposed around the periphery of the well.

6. The apparatus of claim 5 wherein the well has a depth such that the contact pads of the semiconductor device chip disposed in the well are substantially coplanar with the surface of the substrate.

7. The apparatus of claim 1 wherein the semiconductor device chip second surface comprises an upper surface having a multiplicity of electrical pads disposed across substantially the entire surface thereof.

8. The apparatus of claim 1 wherein the semiconductor device chip is interposed between the surface of the substrate and the first surface of the means for electrically connecting.

9. The apparatus of claim 1 wherein the substrate comprises electrical terminals disposed immediately outside the perimeter of the semiconductor device chip.

10. The apparatus of claim 1 wherein the means for electrically connecting comprises a plurality of rows of second electrical contacts around the perimeter of the first surface.

11. The apparatus of claim 1 wherein predetermined ones of the first electrical contacts of the means for electrically connecting are electrically connected.

12. The apparatus of claim 1 wherein the first electrical contacts of the means for electrically connecting comprises a multiplicity of electrical contacts disposed across substantially the entire interior surface portion thereof.

13. The apparatus of claim 12 wherein the means for electrically connecting further comprises semiconductor device chips fabricated therein that are electrically connected to selected ones of the first and second electrical contacts of said means in a predetermined circuit.

14. The apparatus of claim 1 wherein the means for electrically connecting is superposed and substantially entirely covers the semiconductor device chip.

15. Apparatus for mounting a semiconductor device chip and making electrical connections thereto, said apparatus comprising:

a semiconductor substrate having a surface including electrical terminals thereon, the substrate having thermal conductive capability;

a semiconductor device chip having a first surface in contact with the surface of the substrate and being in a thermally conducting relation therewith, and a second surface having a plurality of electrical pads disposed across substantially the entire interior surface thereof, including interior surface portions inboard of the perimeter surface portions of the semiconductor device chip; and

means electrically connecting the substrate electrical terminals immediately outside the perimeter of the semiconductor device chip and the semiconductor device chip electrical pads, the means including a first surface having a plurality of first electrical contacts disposed generally across the entire interior portion thereof making aerial electrical and physical contact with the semiconductor device chip electrical pads, including thouse interior pads disposed inboard of the perimeter surface portions of the semiconductor device chip, and a plurality of second electrical contacts disposed generally around the perimeter of the first surface of the means electrically connecting and being in physical and electrical contact with the substrate electrical terminals, and first and second electrical contacts of the means being electrically connected in a predetermined circuit.

16. The apparatus of claim 15 wherein the semiconductor device chip is a flip chip structure.

17. The apparatus of claim 15 wherein the substrate surface defines a well for receiving a semiconductor device chip.

18. The apparatus of claim 17 wherein the well has a depth such that the contact pads of the semiconductor device chip disposed in the well are substantially coplanar with the surface of the substrate.

19. The apparatus of claim 15 wherein the semiconductor device chip is interposed between the surface of the substrate and the first surface of the means for electrically connecting.

20. The apparatus of claim 15 wherein the means for electrically connecting further comprises semiconductor device chips fabricated therein that are electrically connected to selected ones of the first and second electrical contacts of said means in a predetermined circuit.