Method of manufacturing a thin film transistor

• US 4,778,773 A
• Filed: 06/10/1987
• Issued: 10/18/1988
• Est. Priority Date: 06/10/1986
• Status: Expired due to Term

• Current Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Original Assignee: NEC Corporation
• Inventors: Sukegawa, Osamu
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): Wilczewski, M.
• Application Number:
  US07/060,732
• Time in Patent Office: 496 Days
• Field of Search: 357/23.7, 357/23.9, 437/41, 437/40, 437/101, 437/173, 437/187, 437/43, 350/336
• US Class Current: 438/160
• CPC Class Codes: H01L 21/0274 Photolithographic processes
• CPC Class Codes: H01L 29/458 for thin film silicon, e.g. source or drain electrode
• CPC Class Codes: H01L 29/78669 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: Y10S 438/949 Energy beam treating radiation resist on semiconductor

Abstract

A method of manufacturing a thin film transistor comprises the steps of forming a gate electrode on one surface of a transparent substrate, forming on the substrate an insulating layer and a semiconductor layer in the named order to cover the gate electrode, and depositing a positive photoresist layer on the semiconductor layer. Thereafter, the photoresist layer is exposed by irradiating from the other surface of the substrate so as to use the gate electrode as a mask. Therefore, if the positive photoresist layer is developed, the unexposed portion remains on the semiconductor layer to correspond to the gate electrode. Then, the semiconductor layer is etched using the remaining photoresist as a mask so as to form a semiconductor island on the insulating layer, and source and drain electrodes are formed on the semiconductor island.

Claims

1. A method of manufacturing a thin film field-effect transistor comprising the steps of forming a gate electrode on a top surface of a transparent substrate, forming an insulating layer to cover the gate electrode and the exposed top surface of the substrate, forming a semiconductor layer to cover the insulating layer, depositing a positive photoresist layer on the semiconductor layer, exposing the photoresist layer by irradiating from the bottom surface of the substrate so as to use the gate electrode as a mask, developing the photoresist layer so that the unexposed portion remains on the semiconductor layer in an area corresponding the gate electrode, etching the semiconductor layer using the remaining photoresist as a mask so as to form a semiconductor island on the insulating layer, and forming source and drain electrodes on opposite portions of the semiconductor island, said electrodes being separate from each other so that the semiconductor island functions as a channel region of the thin film field-effect transistor.

2. A method as claimed in claim 1 further including the steps of, after the formation of the semiconductor island, depositing a second insulating layer on the substrate to cover the semiconductor island and the first named insulating layer, depositing a second photoresist layer of the negative photoresist on the second insulating layer, exposing the second photoresist layer by irradiating from the bottom surface of the substrate so as to use the gate electrode as a mask, developing the second photoresist layer so that the second photoresist layer has an opening corresponding to the unexposed portion, etching the second insulating layer in the opening so that the semiconductor island is exposed, and removing the second photoresist layer so that there is exposed a substantially flat surface formed by the semiconductor island and the remaining second insulating layer surrounding the semiconductor island.

3. A method as claimed in claim 1 further including the steps of, after the formation of the semiconductor layer, forming on the semiconductor layer a second insulating layer at a thickness greatly larger than that of the semiconductor layer, depositing the above mentioned photoresist layer on the second insulating layer, exposing the photoresist layer by irradiating from the other surface of the substrate so as to use the gate electrode as the mask, developing the photoresist layer so that the unexposed portion remains on the second insulating layer to correspond to the gate electrode, etching the second insulating layer and the semiconductor layer using the remaining photoresist layer as the mask so as to form on the first named insulating layer the semiconductor island having the second insulating layer remaining on the top surface thereof, depositing on the substrate a third insulating layer at a thickness larger than the semiconductor layer but sufficiently smaller than the second insulating layer so that the semiconductor island, the remaining second insulator and the first named insulating layer are covered by the third insulating layer, the third insulating layer being formed of a material which can be etched at an etch rate sufficiently lower than that of the second insulating layer, and etching the second and third insulating layer with an etchant which etches the second insulating layer at a rate higher than that of the third insulating layer, whereby there is exposed a substantially flat surface formed by the semiconductor island and the remaining third insulating layer surrounding the semiconductor island.

4. A method as claimed in claim 1 wherein the formation of the semiconductor layer includes the step of forming an amorphous silicon layer on the insulating layer.

5. A method as claimed in claim 1 wherein the formation of the semiconductor layer includes the steps of forming an i-type amorphous silicon layer on the insulating layer and then forming an n⁺ -type amorphous silicon layer on the i-type amorphous silicon layer.

6. A method of manufacturing a thin film field-effect transistor comprising the steps of forming a gate electrode on a top surface of a transparent substrate;

forming an insulating layer to cover the gate electrode and the exposed top surface of the substrate;

forming a semiconductor layer to cover the insulating layer by forming an i-type amorphous silicon layer on the insulating layer and then forming an n⁺ -type amorphous silicon layer on the i-type amorphous silicon layer;

providing an anti-oxidation protection coating of a conductive material on the n⁺ -type amorphous silicon layer;

depositing a positive photoresist layer on the anti-oxidation protection coating;

exposing the photoresist layer by irradiating from the bottom surface of the substrate so as to use the gate electrode as a mask;

developing the photoresist layer so that the unexposed portion remains on the anti-oxidation protection conductive coating to correspond to the gate electrode;

etching the anti-oxidation protection conductive coating the semiconductor layer using the remaining photoresist as a mask so as to form a semiconductor island on the insulating layer; and

forming source and drain electrodes on opposite portions of the conductive coating remaining on the semiconductor island separately from each other so that the semiconductor island will function as a channel region of the thin film field-effect transistor.

7. A method of manufacturing a thin film field-effect transistor comprising the steps of forming a gate electrode on a top surface of a transparent substrate, forming a first insulating layer to cover the gate electrode and the exposed top surface of the substrate, forming a semiconductor layer to cover the insulating layer, depositing a positive photoresist layer on the semiconductor layer, exposing the positive photoresist layer by irradiating from the bottom surface of the substrate so as to use the gate electrode as a mask, developing the positive photoresist layer so that the unexposed portion remains on the semiconductor layer to correspond to the gate electrode, etching the semiconductor layer using the remaining photoresist as a mask so as to form a semiconductor island on the insulating layer, depositing a second insulating layer on the substrate to cover the semiconductor island the first insulating layer, depositing a negative photoresist layer on the second insulating layer, exposing the negative photoresist layer by irradiating from the bottom surface of the substrate so as to use the gate electrode as a mask, developing the negative photoresist layer so that the negative photoresist layer has an opening corresponding to the unexposed portion, etching the second insulating layer in the opening so that the semiconductor island is exposed, removing the second photoresist layer so that there is exposed a substantially flat surface formed by the semiconductor island the remaining second insulating layer surrounding the semiconductor island, and forming source and drain electrodes on opposite portions of the semiconductor island, said source and drain being separate from each other so that the semiconductor island functions as a channel region of the thin film field-effect transistor.

8. A method of manufacturing an inverted stagger type of thin film transistor comprising the steps of forming a gate electrode on one surface of a transparent substrate, forming on the substrate a first insulating layer and a semiconductor layer in the named order to cover the gate electrode, forming on the semiconductor layer a second insulating layer at a thickness greatly larger than that of the semiconductor layer, depositing a positive photoresist layer on the second insulating layer, exposing the photoresist layer by irradiating from the other surface of the substrate so as to use the gate electrode as the mask, developing the photoresist layer so that the unexposed portion remains on the second insulating layer to correspond to the gate electrode, etching the second insulating layer and the semiconductor layer using the remaining photoresist layer as the mask so as to form on the first insulating layer the semiconductor island having the second insulating layer remaining on the top surface thereof, depositing on the substrate a third insulating layer at a thickness larger than the semiconductor layer but sufficiently smaller than the second insulating layer so that the semiconductor island, the remaining second insulator and the first insulating layer are covered by the third insulating layer, the third insulating layer being formed of a material which can be etched at an etch rate sufficiently lower than that of the second insulating layer, and etching the second and third insulating layer with an etchant which etches the second insulating layer at a rate higher than that of the third insulating layer, so that there is exposed a substantially flat surface formed by the semiconductor island and the remaining third insulating layer surrounding the semiconductor island, and forming source and drain electrodes on the semiconductor island.