Method and operating system for executing programs in a multi-mode microprocessor

• US 4,779,187 A
• Filed: 04/10/1985
• Issued: 10/18/1988
• Est. Priority Date: 04/10/1985
• Status: Expired due to Term

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Letwin, James
• Primary Examiner(s): Shaw, Gareth D.
• Assistant Examiner(s): CHUN, DEBRA
• Application Number:
  US06/722,052
• Time in Patent Office: 1,287 Days
• Field of Search: 364/200 MS File
• US Class Current: 712/229
• CPC Class Codes: G06F 1/24 Resetting means
• CPC Class Codes: G06F 12/0292 using tables or multilevel address translation means G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10
• CPC Class Codes: G06F 9/45533 Hypervisors; Virtual machine monitors
• CPC Class Codes: G06F 9/468 Specific access rights for resources, e.g. using capability register
• CPC Class Codes: G06F 9/4812 by interrupt, e.g. masked

Abstract

Improved methods and operating systems for use with a multi-mode microprocessor enable efficient operation in a multi-mode environment. Preferred embodiments for use with microprocessors which were not designed to switch from each mode to another mode enable multi-tasking of a mixture of programs written for different modes using the mode switching methods of the present invention. Frequently used portions of the operating system are stored in memory at locations which can be commonly addressed in all modes. Means for handling device drivers and interrupts in all modes are also provided. Preferred embodiments for use with computer systems using microprocessors such as the Intel 80286 include means for storing the operating system routines to maximize performance of the system in real mode. Auxiliary protection hardware and I/O masking hardware are also provided in alternate preferred embodiments to enhance protection during real mode operation of such systems. Means for handling interrupts in a mode switching environment and alternate embodiments to eliminate problems caused by hooking programs in a multi-tasking environment are also provided.

Claims

1. A method of processing interrupts in a digital computer system including a processing unit, a memory, and a multi-tasking operating system, the processing unit including an interrupt vector table for storing the memory addresses of operating system routines or application program routines for servicing interrupts, the method including the steps of:

(a) for each interrupt serviced by an operating system routine, storing the address of the corresponding operating system interrupt service routine in a corresponding client list in a dispatcher routine in the operating system;

(b) for each operating system interrupt service routine, storing the address of the dispatcher in the corresponding interrupt vector;

(c) periodically examining the interrupt vector table to determine if any application programs have edited interrupt vecotrs to replace the address of the dispatcher with the address of an application program service routine;

(d) for any edits located in step (c), placing the address of the application program interrupt service routine on top of the client list for the corresponding interrupt and restoring the interrupt vector value to point to the dispatcher;

(e) upon receipt of an interrupt, successively transferring control to the interrupt service routines until one of the routines services the interrupt; and

(f) upon termination of an application program that has edited the interrupt vector table, deleting the addresses of the interrupt service routines of the terminated program from the client lists of the dispatcher and restoring the values of the interrupts as necessary to point to the dispatcher.

2. The method of claim 1 wherein new interrupt vectors are designated for each interrupt serviced by an operating system interrupt service routine and the new interrupt vectors are set to point to a first location within the dispatcher, and the address of a second entry point in the dispatcher is stored in the original interrupt vectors in step (b), thereby providing a means for distinguishing a true interrupt from an interrupt that has been examined and not dismissed by an application program interrupt service routine