Frequency counting apparatus and method

• US 4,786,861 A
• Filed: 09/01/1987
• Issued: 11/22/1988
• Est. Priority Date: 09/01/1987
• Status: Expired due to Term

• Current Assignee: Alliedsignal Inc. (Honeywell International Inc.)
• Original Assignee: Sundstrand Data Control, Inc. (Rtx Corporation)
• Inventors: Hulsing, Rand H. II, Lee, Charles K.
• Primary Examiner(s): Tokar, Michael J.
• Application Number:
  US07/091,977
• Time in Patent Office: 448 Days
• Field of Search: 377/19, 377/39, 328/133, 328/151, 328/134, 328/136, 307/352, 307/516, 324/77 R, 324/78 R, 324/78 D, 324/79 R, 324/79 D, 324/83 R, 324/83 D
• US Class Current: 324/76.42
• CPC Class Codes: G01R 23/10 by converting frequency into a train of pulses, which are then counted , i.e. converting the signal into a square wave

Abstract

A device and method for measuring the frequency of an input signal by measuring the number of cycles of the input signal that occur in a sample interval between successive sampling times t_n. An integer counter determines an estimated integer number of input signal cycles, and fraction counters determine fractional counts by counting cycles of a clock signal during time intervals between a first measurement time before the sampling time and a second measurement time after the sampling time. A correction circuit refines the fractional counts by determining the phase relationships between the clock and input signals at each measurement time. The correction circuit includes a constant current source, a capacitor, a first switch connected between the constant current source and a reference potential, a second switch connected between the constant current source and the capacitor, and a control circuit for the switches. The control circuit disconnects the current source from the reference potential at each measurement time, and disconnects the current source from the capacitor upon the next occurance of a periodic characteristic of the clock signal that occurs after the measurement time. The voltage on the capacitor then provides the required phase relationship.

Claims

1. A device for determining the phase of a periodic reference signal at a predetermined time, the device comprising:

charge storage means;

current source means;

first switch means connected between the current source means and a reference potential;

second switch means connected between the current source means and the charge storage means; and

control means connected to receive the reference signal and a signal representing the predetermined time, the control means including means for sensing a periodic characteristic of the reference signal, means for causing the current source means to be disconnected from the reference potential at the predetermined time, means for causing the current source means to be disconnected from the charge storage means upon the occurrence of said characteristic after the predetermined time, and means for measuring the voltage on the charge storage means after the occurrence of said characteristic and for producing therefrom a phase signal a_n representing the phase of the reference signal at the predetermined time.

2. The device of claim 1, wherein the control means further comprises calibration means including means for causing the current source means to be disconnected from the reference potential at a gain start time, means for causing the current source means to be disconnected from the charge storage means at a subsequent gain stop time, and means for measuring the voltage on the charge storage means after the gain stop time and for producing therefrom a gain signal G, and wherein the device further comprises processing means for receiving the phase and gain signals and for scaling the phase signal a_n based upon the gain signal to produce a calibrated phase signal a'"'"'_n.

3. The device of claim 2, wherein the gain stop time follows the gain start time by a time interval substantially equal to the period of the reference signal.

4. The device of claim 3, wherein the calibration means includes means for causing the simultaneous disconnection of the current source means from the reference potential and from the charge storage means, and means for measuring the voltage on the charge storage means after said simultaneous disconnection and for producing therefrom a bias signal B, and wherein the processing means comprises means for receiving the phase, gain and bias signals and for producing the calibrated phase signal a'"'"'_n according to the equation:

##EQU6##

5. A method for determining the phase of a periodic reference signal at a predetermined time, the method comprising:

commencing the charging of a charge storage means at a known rate at the predetermined time;

stopping the charging of the charge storage means upon the occurrence of a periodic characteristic of the reference signal that occurs after the predetermined time; and

measuring the voltage on the charge storage means after the occurrence of said characteristic and for producing therefrom a phase signal a_n representing the phase of the reference signal at the predetermined time.

6. The method of claim 5, comprising the further step of causing the charge storage means to be charged at a known rate for a period of time substantially equal to the period of the reference signal, and for subsequently measuring the voltage on the charge storage means and producing therefrom a gain signal, and scaling the phase signal a_n based upon the gain signal to produce a calibrated phase signal a'"'"'_n.

7. A device for determining the time of occurrence of a sampling time t_n in a time period that extends from a first measurement time t_a to a second measurement time t_b, the device comprising:

means for providing a periodic clock signal having a period shorter than the time period between the measurement times;

first counter means for determining a first count value by counting the number of cycles of the clock signal that occur between times t_n and t_b, and for producing a corresponding first count signal X_n ;

second counter means for determining a second count value by counting the number of cycles of the clock signal that occur between the measurement times, and for producing a corresponding second count signal Y_n ;

a correction circuit for producing phase signals a_n and b_n representing the phase of the clock signal at measurement times t_a and t_b respectively; and

processing means for receiving the count and phase signals, for adjusting count signals X_n and Y_n based upon the phase signals to produce corrected count signals X_nc and Y_nc, and for determining the sampling time t_n relative to t_a by determining the quotient X_nc /Y_nc.

8. The device of claim 7, wherein the processing means determines the corrected count values as follows:

space="preserve" listing-type="equation">X.sub.nc =X.sub.n -b.sub.n

space="preserve" listing-type="equation">Y.sub.nc =Y.sub.n +a.sub.n -b.sub.n.

9. The device of claim 7, wherein the correction circuit includes means for sensing a periodic characteristic of the clock signal, and means operative at each measurement time for measuring the elapsed time between the measurement time and the next occurrence of said period characteristic of the clock signal and for producing therefrom the phase signal corresponding to that measurement time.

10. The device of claim 7, wherein the correction circuit comprises charge storage means, current source means, first switch means connected between the current source means and a reference potential, second switch means connected between the current source means and the charge storage means, and control means connected to receive the clock signal and signals representing the sampling and measurement times, the control means including means for sensing a periodic characteristic of the clock signal, means operative at each measurement time for causing the current source means to be disconnected from the reference potential at the measurement time, means for causing the current source means to be disconnected from the charge storage means upon the occurrence of said characteristic after the measurement time, and means for measuring the voltage on the charge storage means after the occurrence of said characteristic and for producing therefrom the phase signal corresponding to that measurement time.

11. The device of claim 10, wherein the control means further comprises calibration means for producing a gain signal G associated with the sampling time, the calibration means including means for causing the current source means to be disconnected from the reference potential at a gain start time, means for causing the current source means to be disconnected from the charge storage means at a subsequent gain stop time, and means for measuring the voltage on the charge storage means after the gain stop time and for producing therefrom the gain signal G, and wherein the processing means includes means for receiving the phase and gain signals and for scaling the phase signals a_n and b_n based upon the gain signal to produce calibrated phase signals a'"'"'_n and b'"'"'_n respectively, and means for adjusting the count signals based upon the calibrated phase signals.

12. The device of claim 11, wherein the gain stop time follows the gain start time by a time interval substantially equal to the period of the clock signal.

13. The device of claim 12, wherein the calibration means includes means for causing the simultaneous disconnection of the current source means from the reference potential and from the charge storage means at a bias calibration time associated with the sampling time, and means for measuring the voltage on the charge storage means after said simultaneous disconnection and for producing therefrom a bias signal B, and wherein the processing means includes means for receiving the phase, gain and bias signals and for adjusting phase signals a_n and b_n to produce calibrated phase signals a'"'"'_n and b'"'"'_n, respectively, according to the equations:

##EQU7##

14. A method for determining the time of occurrence of a sampling time t_n in a time period that extends from a first measurement time t_a to a second measurement time t_b, the method comprising:

providing a periodic clock signal havin a period shorter than the time period between the measurement times;

determining a first count value by counting the number of cycles of the clock signal that occur between times t_n and t_b, and for producing a corresponding first count signal X_n ;

determining a second count value by counting the number of cycles of the clock signal that occur between the measurement times, and for producing a corresponding second count value Y_n ;

producing phase signals a_n and b_n representing the phase of the clock signal at measurement times t_a and t_b respectively; and

adjusting count signals X_n and Y_n based upon the phase signals to produce corrected count signals X_nc and Y_nc, and determining the sampling time t_n relative to t_a by determining the quotient X_nc /Y_nc.

15. The method of claim 14, wherein the processing means determines the corrected count values as follows:

space="preserve" listing-type="equation">X.sub.nc =X.sub.n -b.sub.n

space="preserve" listing-type="equation">Y.sub.nc =Y.sub.n +a.sub.n -b.sub.n.

16. The method of claim 14, wherein the step of producing the phase signals comprises, at each measurement time, the step of measuring the elapsed time between the measurement time and the next occurrence of a periodic characteristic of the clock signal, and producing therefrom the phase signal corresponding to that measurement time.

17. The method of claim 14, wherein the step of producing the phase signals comprises, at each measurement time, the further steps of commencing the charging of a charge storage means at a known rate at the measurement time, stopping the charging of the charge storage means upon the occurrence of a periodic characteristic of the clock signal that occurs after the measurement time, and measuring the voltage on the charge storage means after the occurrence of said characteristic of the clock signal and producing therefrom the phase signal corresponding to that measurement time.

18. The method of claim 17, comprising the further step of causing the charge storage means to be charged at a known rate for a period of time substantially equal to the period of the reference signal, and for subsequently measuring the voltage on the charge storage means and producing therefrom a gain signal G associated with the sampling time, and scaling the phase signals a_n and b_n based upon the gain signal to produce calibrated phase signals a'"'"'_a and b'"'"'_n respectively, and adjusting the count signals based upon the calibrated phase signals.

19. A device for measuring the frequency of an input signal by measuring the number of cycles of the input signal that occur in a sample interval between first and second sampling times, the device comprising:

means for providing a periodic clock signal having a frequency higher than that of the input signal;

integer counter means including means for sensing a periodic characteristic of the input signal, and for producing therefrom an integer signal representing an estimated integer number N of cycles of the input signal that occur in the sampling interval;

fraction measurement means for determining the time of occurrence of each sampling time t_n in a time period that extends from a first measurement time t_a corresponding to the occurrence of the characteristic of the input signal preceding t_n to a second measurement time t_b corresponding to the occurrence of the characteristic of the input signal following t_n, the fraction measurement means comprising;

(i) first counter means for determining a first count value by counting the number of cycles of the clock signal that occur between times t_n and t_b, and for producing a corresponding first count signal X_n ;

(ii) second counter means for determining a second count value by counting the number of cycles of the clock signal that occur between the measurement times and for producing a corresponding second count signal Y_n ; and

(iii) a correction circuit for producing phase signals a_n and b_n representing the phase of the clock signal at measurement times t_a and t_b, respectively; and

processing means for receiving the integer signal and the count and phase signals for each sampling time, the processing means including means for adjusting count signals X_n and Y_n for each sampling time based upon the phase signals for that sampling time, to thereby produce corrected count signals X_nc and Y_nc for each sampling time, and means for measuring the number of cycles C_n of the input signal that occur in the sampling interval by determining N plus the quotient X_nc /Y_nc for the first sampling time minus the quotient X_nc /Y_nc for the second sampling time.

20. The device of claim 19, wherein the processing means determines the corrected count values as follows:

space="preserve" listing-type="equation">X.sub.nc =X.sub.n -b.sub.n

space="preserve" listing-type="equation">Y.sub.nc =Y.sub.n +a.sub.n -b.sub.n.

21. The device of claim 19, wherein the correction circuit comprises means for sensing a periodic characteristic of the clock signal, and means operative at each measurement time for measuring the elapsed time between the measurement time and the next occurrence of the periodic characteristic of the clock signal, and for producing therefrom the phase signal corresponding to that measurement time.

22. The device of claim 19, wherein the correction circuit comprises charge storage means, current source means, first switch means connected between the current source means and a reference potential, second switch means connected between the current source means and the charge storage means, and control means connected to receive the clock and input signals and a sample signal defining the sampling times, the control means including means for sensing a periodic characteristic of the clock signal, means operative at each measurement time for causing the current source means to be disconnected from the reference potential at the measurement time, for causing the current source means to be disconnected from the charge storage means upon the occurrence of said characteristic of the clock signal after the measurement time, and for measuring the voltage on the charge storage means after the occurrence of said characteristic of the clock signal and for producing therefrom the phase signal corresponding to that measurement time.

23. The device of claim 22, wherein the control means further comprises calibration means for producing a gain signal G for each sampling time, the calibration means including means for causing the current source means to be disconnected from the reference potential at a gain start time, means for causing the current source means to be disconnected from the charge storage means at a subsequent gain stop time, and means for measuring the voltage on the charge storage means after the gain stop time and for producing therefrom the gain signal G for the sampling time, and wherein the processing means includes means for scaling each phase signal based upon the gain signal for the associated sampling time.

24. The device of claim 23, wherein for each sampling time, the gain stop time follows the gain start time by a time interval substantially equal to the period of the clock signal.

25. The device of claim 24, wherein the calibration means includes means for causing the simultaneous disconnection of the current source means from the reference potential and from the charge storage means at bias calibration times associated with the respective sampling times, and means for measuring the voltage on the charge storage means after said simultaneous disconnection for each bias calibration time and for producing therefrom a bias signal B for the sampling time, and wherein the processing means includes means for receiving the phase, gain and bias signals and for adjusting phase signals a_n and b_n for each sampling time to produce calibrated phase signals a_n'"'"' and b_n '"'"' respectively for the sampling time, according to the equations:

##EQU8## where G and B are the gain and bias signals, respectively, for the associated sampling time.

26. A method for measuring the frequency of an input signal by measuring the number of cycles of the input signal that occur in a sample interval between first and second sampling times, the method comprising:

providing a periodic clock signal having a frequency higher than that of the input signal;

sensing a predetermined periodic characteristic of the input signal and producing therefrom an integer signal representing an estimated number N of cycles of the input signal that occur in the sampling interval;

determining the time of occurrence of each sampling time t_n in a time period that extends from a first measurement time t_a corresponding to the occurrence of the characteristic of the input signal preceding t_n to a second measurement time t_b corresponding to the characteristic of the input signal occurring following t_n, the step of determining the time of occurrence of each sampling time t_n comprising;

(i) determining a first count value by counting the number of cycles of the clock signal that occur between times t_n and t_b and producing a corresponding first count signal X_n ;

(ii) determining a second count value by counting the number of cycles of the clock signal that occur between the measurement times and producing a corresponding second count signal Y_n ; and

(iii) producing phase signals a_n and b_n representing the phase of the clock signal at measurement times t_a and t_b, respectively; and

,

adjusting count signals X_n and Y_n for each sampling time based upon the phase signals for that sampling time, to thereby produce corrected count signals X_nc and Y_nc for each sampling time, and measuring the number of cycles C_n of the input signal that occur in the sampling interval by determining N plus the quotient X_nc /Y_nc for the first sampling time minus the quotient X_nc /Y_nc for the second sampling time.

27. The method of claim 26, wherein the processing means determines the corrected count values as folows:

space="preserve" listing-type="equation">X.sub.nc =X.sub.n -b.sub.n

space="preserve" listing-type="equation">Y.sub.nc =Y.sub.n +a.sub.n -b.sub.n.

28. The method of claim 26, wherein the step of producing the phase signals comprises, at each measurement time, the further steps of measuring the elapsed time between the measurement time and the next occurrence of a periodic characteristic of the clock signal, and producing therefrom the phase signal corresponding to that measurement time.

29. The method of claim 26, wherein the step of producing the phase signals comprises, at each measurement time, the further steps of commencing the charging of a charge storage means at a known rate at the measurement time, stopping the charging of the charge storage means upon the occurrence of a periodic characteristic of the clock signal that occurs after the measurement time, and measuring the voltage on the charge storage means after the occurrence of said characteristic of the clock signal and producing therefrom the phase signal corresponding to that measurement time.

30. The method of claim 29, comprising the further step, at each sampling time, of causing the charge storage means to be charged at a known rate for a period of time substantially equal to the period of the clock signal, and for subsequently measuring the voltage on the charge storage means and producing therefrom a gain signal G for the associated sampling time, and scaling the phase signals a_n and b_n based upon the gain signal to produce calibrated phase signals a'"'"'_n and b'"'"'_n respectively for each sampling time, and adjusting the count signals for each sampling time based upon the associated calibrated phase signal.