Temperature compensation circuit for a delay circuit utilized in an FM detector

• US 4,789,976 A
• Filed: 03/25/1987
• Issued: 12/06/1988
• Est. Priority Date: 03/31/1986
• Status: Expired due to Term

• Current Assignee: Yamaha Corporation
• Original Assignee: Nippon Yusen Kabushiki Kaisha
• Inventors: Fujishima, Masakazu
• Primary Examiner(s): RICHARDSON, ROBERT
• Application Number:
  US07/030,159
• Time in Patent Office: 622 Days
• Field of Search: 358/337, 358/338, 358/320, 358/321, 358/330, 369/54, 357/28, 357/41, 357/51, 307/310, 307/450, 307/451, 307/579, 329/110, 329/107, 329/126, 329/134
• US Class Current: 369/53.33
• CPC Class Codes: G11B 20/00007 Time or data compression or expansion audio compression based on psychoacoustics G10L19/00; data processing for reproducing audio data at different playback speeds G10L21/04; video compression H04N19/00; data compression per se H03M7/30
• CPC Class Codes: G11B 20/10009 Improvement or modification of read or write signals
• CPC Class Codes: G11B 7/005 Reproducing G11B7/0065 takes precedence
• CPC Class Codes: G11B 7/0946 specially adapted for operation during external perturbations not related to the carrier or servo beam, e.g. vibration
• CPC Class Codes: H03D 3/18 by means of synchronous gating arrangements
• CPC Class Codes: H03K 19/00323 Delay compensation
• CPC Class Codes: H03K 19/00369 Modifications for compensating variations of temperature, supply voltage or other physical parameters
• CPC Class Codes: H03K 2005/00097 Avoiding variations of delay using feedback, e.g. controlled by a PLL
• CPC Class Codes: H03K 2005/00104 using a reference signal, e.g. a reference clock
• CPC Class Codes: H03K 2005/00195 using FET's
• CPC Class Codes: H03K 5/133 using a chain of active delay devices
• CPC Class Codes: H04N 9/802 involving processing of the sound signal H04N9/806, H04N9/835 take precedence
• CPC Class Codes: H04N 9/88 Signal drop-out compensation

Abstract

A circuit for compensating change in delay time of a delay circuit due to variation in temperature employs, as a phase shifter of a pulse FM detection circuit, a delay circuit whose delay time is subject to change due to variation in temperature and can be controlled in response to a control signal. A dc component in an output of this pulse FM detection circuit is compared with a preset reference value and a resulting comparison output is used for controlling the delay time of the delay circuit and thereby compensating the temperature characteristic of the delay time. In a device using plural delay circuits, these delay circuits can be disposed on the same substrate and the delay times of these delay circuits can be controlled by the same comparison output. Since a signal which is handled by a delay circuit is utilized for the temperature compensation, an accurate temperature compensation can be realized with a simple circuit construction.

Claims

1. A temperature compensation circuit for a delay circuit comprising:

a delay circuit which is used as a phase-shifter in a pulse FM detection circuit and whose delay time changes depending upon temperature and can be controlled in response to a control signal;

a dc component detection circuit for detecting a dc component in an output of said pulse FM detection circuit; and

comparison control means for comparing the dc component detected by said dc component detection circuit with a predetermined reference value for controlling delay time of said delay circuit with a comparison output of the comparison control means and thereby compensating a temperature characteristic of the delay time of said delay circuit.

2. A temperature compensation circuit as defined in claim 1 wherein said delay circuit is constructed of cascade-connected CMOS inverters.

3. A temperature compensation circuit as defined in claim 2 wherein said comparison control means controls power voltage supplied to said CMOS inverters of said delay circuit with said comparison output for controlling the delay time.

4. A temperature compensation circuit as defined in claim 3 wherein said pulse FM detection circuit comprises an exclusive OR gate to which a pulse frequency-modulated signal and a signal derived by delaying this pulse frequency-modulated signal by said delay circuit are applied.

5. A temperature compensation circuit as defined in claim 1 wherein said delay circuit and other delay circuits whose delay time changes depending upon temperature and can be controlled in response to a control signal are disposed on the same substrate and the delay times of these other delay circuits are controlled by said comparison output to compensate temperature characteristics of the delay times of said other delay circuits.