CMOS differential-amplifier sense amplifier
First Claim
1. A sense amplifier, comprising:
- a first voltage-controlled current source having a control terminal, and first and second current terminals for carrying current therebetween, said second current terminal coupled to a power supply terminal;
a first current mirror load having a reference portion and a load portion, said reference portion coupled to the control terminal of the first voltage-controlled current source and said load portion for providing a first output signal of said sense amplifier;
a first transistor having a first current electrode coupled to the reference portion of said first current mirror load, a control electrode coupled to a first input signal, and a second current electrode coupled to the first current terminal of the first voltage-controlled current source;
a second transistor having a first current electrode coupled to the load portion of said first current mirrior load, a control electrode for receiving a second input signal, and a second current electrode coupled to the second current electrode of the first transistor; and
first disable means, coupled to the first current mirror load, for disabling the first current mirror load in response to a disable signal.
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Accused Products
Abstract
A CMOS sense amplifier for use in a memory comprises two CMOS differential amplifiers. Each differential amplifier receives the same two signals generated from a selected bit line pair and each provides a different one of a complementary pair of signals. Each differential amplifier has a current mirror for loads. Each differential amplifier uses a transistor current source. A transistor will operate as a more ideal current source if it is in saturation. The transistor current source is biased by the current mirror of the differential amplifier of which it is a part. The resulting differential amplifier thus has a transistor current source which is biased closer to saturation than if biased by a normal clock signal which is either at the high or low power supply voltage. The self-biasing aspect avoids the problems associated with generating a special reference voltage for the differential amplifier.
63 Citations
10 Claims
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1. A sense amplifier, comprising:
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a first voltage-controlled current source having a control terminal, and first and second current terminals for carrying current therebetween, said second current terminal coupled to a power supply terminal; a first current mirror load having a reference portion and a load portion, said reference portion coupled to the control terminal of the first voltage-controlled current source and said load portion for providing a first output signal of said sense amplifier; a first transistor having a first current electrode coupled to the reference portion of said first current mirror load, a control electrode coupled to a first input signal, and a second current electrode coupled to the first current terminal of the first voltage-controlled current source; a second transistor having a first current electrode coupled to the load portion of said first current mirrior load, a control electrode for receiving a second input signal, and a second current electrode coupled to the second current electrode of the first transistor; and first disable means, coupled to the first current mirror load, for disabling the first current mirror load in response to a disable signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A sense amplifier, comprising:
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a first transistor of the first conductivity type having a first current electrode coupled to a first power supply terminal, and a control electrode and a second current electrode coupled to a first node; a second transistor of a second conductivity type having a first current electrode coupled to the first node, a control electrode for receiving a first input signal, and a second current electrode; a third transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the second transistor, a control electrode coupled to the first node, and a second current electrode; a fourth transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the third transistor, a control electrode for receiving an enable signal, and a second current electrode coupled to a second power supply terminal; a fifth transistor of the first conductivity type having a first current electrode coupled to the first power supply terminal, a control electrode coupled to the first node, and a second current electrode for providing a first output signal; a sixth transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the fifth transistor, a control electrode for receiving a second input signal, and a second current electrode; a seventh transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the sixth transistor, a control electrode coupled to the first node, and a second current electrode; an eighth transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the seventh transistor, a control electrode for receiving the enable signal, and a second current electrode coupled to the second power supply terminal; a ninth transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the second transistor, a second current electrode coupled to the second current electrode of the sixth transistor, and a control electrode for receiving the enable signal; and a tenth transistor of the first conductivity type having a first current electrode coupled to the first power supply terminal, a second current electrode coupled to the first node, and a control electrode for receiving the enable signal.
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10. A sense amplifier, comprising:
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an eleventh transistor of the first conductivity type having a first current electrode coupled to a first power supply terminal, and a control electrode and a second current electrode coupled to a second node; a twelfth transistor of the second conductivity type having a first current electrode coupled to the second node, a control electrode for receiving the second input signal, and a second current electrode; a thirteenth transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the twelfth transistor, a control electrode coupled to the second node, and a second current electrode; a fourteenth transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the thirteenth transistor, a control electrode for receiving the enable signal, and a second current electrode coupled to the second power supply terminal; a fifteenth transistor of the first conductivity type having a first current electrode coupled to the first power supply terminal, a control electrode coupled to the second node, and a second current electrode for providing a second output signal; a sixteenth transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the fifteenth transistor, a control electrode for receiving the first input signal, and a second current electrode; a seventeenth transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the sixteenth transistor, a control electrode coupled to the second node, and a second current electrode; an eighteenth transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the seventeenth transistor, a control electrode for receiving the enable signal, and a second current electrode coupled to the second power supply terminal; a nineteenth transistor of the second conductivity type having a first current electrode coupled to the second current electrode of the twelfth transistor, a second current electrode coupled to the second current electrode of the sixteenth transistor, and a control electrode for receiving the enable signal; and a twentieth transistor of the first conductivity type having a first current electrode coupled to the first power supply terminal, a second current electrode coupled to the second node, and a control electrode for receiving the enable signal.
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Specification