×

Single wafer moated process

  • US 4,794,092 A
  • Filed: 11/18/1987
  • Issued: 12/27/1988
  • Est. Priority Date: 11/18/1987
  • Status: Expired due to Term
First Claim
Patent Images

1. A method of forming an integrated circuit chip from a wafer wherein the doped portions of the wafer are electrically isolated from edge portions thereof, comprising:

  • forming a plurality of grooves in a wafer;

    selectively doping a first surface of the wafer;

    depositing insulating material within the grooves;

    forming conductive lead upon the first surface of said wafer, said conductive lead extending to and across at least a portion of said grooves;

    thinning the wafer such that said grooves extend the entire thickness of the wafer;

    trimming longitudinal edge portions of the wafer so that the length of the wafer is bounded by portions of said grooves and the insulating material therein; and

    depositing conductive material along the longitudinal edge portions of the wafer, said conductive material being in electrical communication with at least one of the conductive leads formed on the surface of the wafer, said conductive material being isolated by said insulating material from the wafer, except through said at least one of the conductive leads.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×