Semiconductor device having multilayer silicide contact system and process of fabrication thereof

• US 4,800,177 A
• Filed: 03/14/1986
• Issued: 01/24/1989
• Est. Priority Date: 03/14/1985
• Status: Expired due to Term

• Current Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Original Assignee: NEC Corporation
• Inventors: Nakamae, Masahiko
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): QUACH, TUAN N
• Application Number:
  US06/840,317
• Time in Patent Office: 1,047 Days
• Field of Search: 437/200, 437/201, 437/192-195, 437/162, 357/67, 357/71
• US Class Current: 438/627
• CPC Class Codes: H01L 21/28525 the conductive layers comprising semiconducting material H01L21/28518, H01L21/28537 take precedence
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: Y10S 148/124 Polycrystalline emitter
• CPC Class Codes: Y10S 148/147 Silicides

Abstract

A process for making a semiconductor device including a semiconductor layer heavily doped to a predetermined dopant concentration and a multilayer contact system in contact with a surface portion of the heavily doped semiconductor layer, the multilayer contact system comprising a metal silicide layer of the silicide of a refractory metal, the metal silicide layer directly contacting the surface portion of the heavily doped semiconductor layer and being lower in dopant concentration than the predetermined dopant concentration of the semiconductor layer, a barrier layer of at least one metal on the metal silicide layer, and an electrode layer including a highly conductive metal on the barrier layer.

Claims

1. A process of fabricating a semiconductor device, comprising

(a) forming a heavily doped first semiconductor layer of a first conductivity type,

(b) forming a first protective layer of an insulating material on said first semiconductor layer and having an opening allowing a portion of the first semiconductor layer to be exposed therethrough,

(c) forming a second silicon layer partly on said first protective layer and partly on said portion of said first semiconductor layer,

(d) heavily doping said second silicon layer with a dopant of a second conductivity type opposite to said first conductivity type and thereafter annealing the doped second silicon layer to form in said first semiconductor layer an active region of said second conductivity type substantially aligned with said opening with enhanced ohmic contact provided between said active region and said second silicon layer,

(e) forming a substantially non-doped third silicon layer on said second silicon layer,

(f) forming a second protective layer of an insulating material on said third silicon layer and having an opening allowing a portion of the third semiconductor layer to be exposed therethrough, the opening in the second protective layer being substantially aligned with the opening in said first protective layer across said second and third silicon layers,

(g) forming a layer of a refractory metal partly on said second protective layer and partly on said portion of said third silicon layer,

(h) heating the resultant structure to cause the refractory metal layer and the third silicon layer to react with each other for thereby forming a metal silicide layer of the refractory metal silicide,

(i) forming a barrier layer of at least one metal on said metal silicide layer, and

(j) forming an electrode layer including a highly conductive metal on said barrier layer.

2. A process of fabricating a semiconductor device, comprising

(a) forming a heavily doped first silicon layer of a first conductivity type,

(b) forming a first silicon oxide layer on said silicon layer and having an opening allowing a portion of the silicon layer to be exposed therethrough,

(c) forming a first polysilicon layer partly on said first silicon oxide layer and partly on said portion of said first silicon layer,

(d) heavily doping said first polysilicon layer with a dopant of a second conductivity type opposite to said first conductivity type and thereafter annealing the doped first polysilicon layer to form in said first silicon layer an active region of said second conductivity type substantially aligned with said opening with enhanced ohmic contact provided between said active region and said first polysilicon layer,

(e) forming a substantially non-doped second polysilicon layer on said first polysilicon layer,

(f) forming a second silicon oxide layer on said second polysilicon layer and having an opening allowing a portion of the second polysilicon layer to be exposed therethrough, the opening in the second silicon oxide layer being substantially aligned with the opening in said first silicon oxide layer across said second and second polysilicon layers,

(g) forming a layer of a refractory metal partly on said second silicon oxide layer and partly on said portion of said second polysilicon layer,

(h) heating the resultant structure to cause the refractory metal layer and the second polysilicon layer to react with each other for thereby forming a metal silicide layer of the refractory metal silicide,

(i) forming a barrier layer of at least one metal on said metal silicide layer, and

(j) forming an electrode layer including a highly conductive metal on said barrier layer.

3. A process of fabricating a semiconductor device, comprising

(a) forming a heavily doped first silicon layer of a first conductivity type,

(b) forming a first silicon oxide layer on said silicon layer and having an opening allowing a portion of the silicon layer to be exposed therethrough,

(c) forming a first polysilicon layer partly on said first silicon oxide layer and partly on said portion of said first silicon layer,

(d) doping said first polysilicon layer with a dopant of a second conductivity type opposite to said first conductivity type to a dopant density higher than 1×

10¹⁹ atoms/cm²,

(e) thereafter annealing the doped first polysilicon layer to form in said first silicon layer an active region of said second conductivity type substantially aligned with said opening with enhanced ohmic contact provided between said active region and said first polysilicon layer,

(f) forming a second polysilicon layer on said first polysilicon layer to a thickness within a range of from about 300 Å

to about 100 Å

, said second polysilicon layer containing impurities in a concentration less than 1×

10¹⁷ atoms/cm³,

(g) forming a second silicon oxide layer on said second polysilicon layer and having an opening allowing a portion of the second polysilicon layer to be exposed therethrough, the opening in the second silicon oxide layer being substantially aligned with the opening in said first silicon oxide layer across said second and second polysilicon layers,

(h) forming a layer of a refractory metal partly on said second silicon oxide layer and partly on said portion of said second polysilicon layer,

(i) heating the resultant structure to cause the refractory metal layer and the second polysilicon layer to react with each other for thereby forming a metal silicide layer of the refractory metal silicide,

(j) forming a barrier layer of at least one metal on said metal silicide layer, and

(k) forming an electrode layer including a highly conductive metal on said barrier layer.

4. A process as set forth in claim 3, in which said first polysilicon layer is doped with said dopant with a dosage selected to provide a dopant density of a range of from about 1×

10¹⁹ atoms/cm³ to about 1×

10²¹ atoms/cm³.