Digital engine analyzer
First Claim
1. An engine analyzer for analyzing an internal combustion engine that produces analog signals, said engine analyzer comprising an analog to digital converter for converting the analog signals into digital signals at a variable sampling rate, memory means including first and second memory banks for storing the digital signals, memory write means coupled to said memory means for writing the digital signals into said memory means at a variable writing rate which corresponds to the rate at which the digital signals are being produced, memory readout means coupled to said memory means for reading the digital signals from said memory means, control means for controlling said memory banks, said memory write means and said memory readout means to enable digital signals to be written into said first memory bank while digital signals are read from said second memory bank and to enable digital signals to be read from said first memory bank while digital signals are written into said second memory bank, a cathode ray tube including a screen and an electron beam which is swept across said screen, said control means being coupled to the engine to receive information on the speed of the engine to cause the sampling rate and the writing rate to be dependent on the engine speed and to vary the rates automatically in correspondence with changes in engine speed, and said control means controlling the readout rate to correspond with the rate at which the beam is swept across the screen, the rate at which digital signals are read out of said memory means being many times greater than the rate at which digital signals are written into said memory means, said screen being defined by a plurality of rows and a plurality of columns, the electron beam being selectively operable to illuminate selected points at the intersections of the rows and the columns, each digital signal identifying the row location of a selected point in a different one of the columns (R-CC), the electron beam scanning said screen along a row in one row after the next, row monitoring means for monitoring the row in which the electron beam is sweeping at an instant of time (R-S), latching means having a clock input coupled to a source of clock signals and a signal input coupled to said memory means for receiving the R-CC information on a row containing a data point in a given column and latching it until R-CC information for the next column is read out so as to provide information on the row containing a data point in the immediately preceding column (R-PC), and circuit means coupled to said row monitoring means and to said memory means and to said latching means and being responsive to R-S and R-CC and R-PC information to provide a screen energizing signal at each intersection corresponding to the location of a digital signal and to each intersection in a column below a digital signal intersection in such column and above a digital signal intersection in the immediately preceding column and to each intersection in a column above a digital signal intersection in such column and below a digital signal intersection in an immediately preceding column, thereby giving continuity to the waveform displayed on said screen.
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Accused Products
Abstract
A microprocessor controlled digital engine analyzer receives analog input signals from an engine being analyzed, engine parameter data entered via a keyboard, and function data, selecting one of several operating modes for the analyzer and which information is to be displayed, entered via the keyboard, and displays on a CRT screen the selected information such as cylinder firing order, RPM, Dwell, KV and DC volts, alphanumerically, information such as primary and secondary ignition and voltage, alternator and fuel injector information through the use of continuous waveform patterns, and additional information pertaining to Dwell, KV and Cylinder Shorting through the use of bar graphs. The waveform pattern data derived from the analog input signals is stored in a dual bank waveform memory and read out for display on the CRT screen under hardware control, and address data representing alphanumeric data and screen formats for the various operating modes to be displayed is stored in a dual bank display memory for application to a character generator, a bank switching arrangement being used for both the waveform memory and the display memory to enable the banks of each memory to be alternately written to and read from. A main microprocessor receives and processes analog input signals, other than the waveform pattern signals, and a display microprocessor receives numerical data from the main microprocessor and causes display of the numerical data on the CRT screen.
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Citations
8 Claims
- 1. An engine analyzer for analyzing an internal combustion engine that produces analog signals, said engine analyzer comprising an analog to digital converter for converting the analog signals into digital signals at a variable sampling rate, memory means including first and second memory banks for storing the digital signals, memory write means coupled to said memory means for writing the digital signals into said memory means at a variable writing rate which corresponds to the rate at which the digital signals are being produced, memory readout means coupled to said memory means for reading the digital signals from said memory means, control means for controlling said memory banks, said memory write means and said memory readout means to enable digital signals to be written into said first memory bank while digital signals are read from said second memory bank and to enable digital signals to be read from said first memory bank while digital signals are written into said second memory bank, a cathode ray tube including a screen and an electron beam which is swept across said screen, said control means being coupled to the engine to receive information on the speed of the engine to cause the sampling rate and the writing rate to be dependent on the engine speed and to vary the rates automatically in correspondence with changes in engine speed, and said control means controlling the readout rate to correspond with the rate at which the beam is swept across the screen, the rate at which digital signals are read out of said memory means being many times greater than the rate at which digital signals are written into said memory means, said screen being defined by a plurality of rows and a plurality of columns, the electron beam being selectively operable to illuminate selected points at the intersections of the rows and the columns, each digital signal identifying the row location of a selected point in a different one of the columns (R-CC), the electron beam scanning said screen along a row in one row after the next, row monitoring means for monitoring the row in which the electron beam is sweeping at an instant of time (R-S), latching means having a clock input coupled to a source of clock signals and a signal input coupled to said memory means for receiving the R-CC information on a row containing a data point in a given column and latching it until R-CC information for the next column is read out so as to provide information on the row containing a data point in the immediately preceding column (R-PC), and circuit means coupled to said row monitoring means and to said memory means and to said latching means and being responsive to R-S and R-CC and R-PC information to provide a screen energizing signal at each intersection corresponding to the location of a digital signal and to each intersection in a column below a digital signal intersection in such column and above a digital signal intersection in the immediately preceding column and to each intersection in a column above a digital signal intersection in such column and below a digital signal intersection in an immediately preceding column, thereby giving continuity to the waveform displayed on said screen.
- 5. An engine analyzer for analyzing an internal combustion engine that produces analog signals, said engine analyzer comprising an analog to digital converter for converting the analog signals into digital signals at a variable sampling rate, memory means for storing the digital signals, memory write means coupled to said memory means for writing the digital signals into said memory means at a variable writing rate, memory readout means coupled to said memory means for reading the digital signals from said memory means, a cathode ray tube including a screen and an electron beam which is swept across said screen, control means coupled to the engine to receive information on the speed of the engine, said control means controlling said analog to digital converter and said memory write means to cause the sampling rate and the writing rate to have values dependent on the engine speed, and to vary the values automatically in correspondence with changes in engine speed, and said control means controlling the readout rate to correspond with the rate at which the beam is swept across the screen, said screen being defined by a plurality of rows and a plurality of columns, the electron beam being selectively operable to illuminate selected points at the intersections of the rows and the columns, each digital signal identifying the row location of a selected point in a different one of the columns, the electron beam scanning said screen along a row in one row after the next, row count means for providing a row count signal representing the row in which the electron beam is sweeping at an instant of time, said read out means reading said digital signals out of said memory means in sequence as the electron beam is scanning said screen, signal processing means coupled to said memory means and to said row count means and being responsive to th e digital signals read out of said memory means and the row count signal to provide first signals representing the row locations for the selected points in each column, and second signals representing row locations for points in a given column between the row location for the selected point in said given column and the row location for the selected point in the immediately preceding column, and screen energizing means responsive to said first and second signals for energizing the beam to illuminate the points represented by the first and second signals.
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8. An engine analyzer for analyzing an internal combustion engine that produces analog signals, said engine analyzer comprising an analog to digital converter for converting the analog signals into digital signals at a variable sampling rate, memory means including first and second memory banks for storing the digital signals, memory write means coupled to said memory means for writing the digital signals into said memory means at a variable writing rate, memory readout means coupled to said memory means for reading the data signals from said memory means, control means for controlling said memory banks, said memory write means and said memory readout means to enable digital signals to be written into said first memory bank while digital signals are read from said second memory bank and to enable digital signals to be read from said first memory bank while digital signals are written into said second memory bank, a cathode ray tube including a screen and an electron beam which is swept across said screen, said control means being coupled to the engine to receive information on the speed of the engine to cause the sampling rate and the writing rate to have values dependent on the engine speed and to vary the values automatically in correspondence with changes in engine speed, and said control means controlling the readout rate to correspond with the rate at which the beam is swept across the screen, said screen being defined by a plurality of rows and a plurality of columns, the electron beam being selectively operable to illuminate selected points at the intersections of the rows and the columns, each digital signal identifying the row location of a selected point in a different one of the columns (R-CC), the electron beam scanning said screen along a row in one row after the next, row count means for providing a row count signal representing the row in which the electron beam is sweeping at an instant of time (R-S), said read out means reading the digital signals out of said memory means in sequence as the electron beam is scanning said screen, signal processing means including means responsive to the R-CC information to provide information on the row containing a data point in the immediately preceding column (R-PC), and means responsive to the R-S and R-CC and R-PC information to provide a screen energizing signal at each intersection corresponding to the location of a digital signal and to each intersection in a column below a digital signal intersection in such column and above a digital signal intersection in the immediately preceding column and to each intersection in a column above a digital signal intersection in such column and below a digital signal intersection in an immediately preceding column, thereby giving continuity to the wave form displayed on said screen.
Specification