Voltage stabilizer with a minimal voltage drop designed to withstand high voltage transients
First Claim
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1. A voltage regulator circuit comprising:
- a first bipolar transistor of a first type of conductivity having a collector terminal and an emitter terminal and a base terminal;
second and third bipolar transistors of a second type of conductivity which is opposite to said first type of conductivity, each of said transistors having a collector terminal and an emitter terminal and a base terminal;
a differential amplifier having first and second input terminals and an output terminal;
said voltage regulator circuit having first and second input terminals and an output terminal and a common terminal;
a circuit biasing means connected between said first and second input terminals and said common terminal and having outputs connected to said base terminals of said second and third transistors;
a voltage divider means connected between said output terminal and said common terminal and having an output connected to said first input terminal of said differential amplifier;
wherein a reference voltage is connected to said second input terminal of said differential amplifier;
and wherein said collector terminal and emitter terminal of said first transistor are respectively connected to said first input terminal and output terminal and said base terminal of said first transistor is connected to said output of said differential amplifier and said collector terminal and emitter terminal of said second transistor are respectively connected to said output of said differential amplifier and said first input terminal; and
wherein said collector terminal and said emitter terminal of said third transistor are respectively connected to said output of said differential amplifier and said second input terminal.
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Abstract
A voltage stabilizer with a minimal voltage drop designed to withstand high voltage transients includes a "series" type voltage regulator circuit with an NPN power transistor. The collector terminal of this transistor is connected to ground via a capacitor and to the cathode of a diode whose anode forms an input terminal of the stabilizer. The base terminal of the power transistor is connected to the collector terminals of first and second PNP transistors which have their emitter terminals respectively connected to the cathode and anode of the diode and their base terminals connected to a circuit biasing circuit.
7 Citations
16 Claims
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1. A voltage regulator circuit comprising:
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a first bipolar transistor of a first type of conductivity having a collector terminal and an emitter terminal and a base terminal; second and third bipolar transistors of a second type of conductivity which is opposite to said first type of conductivity, each of said transistors having a collector terminal and an emitter terminal and a base terminal; a differential amplifier having first and second input terminals and an output terminal; said voltage regulator circuit having first and second input terminals and an output terminal and a common terminal; a circuit biasing means connected between said first and second input terminals and said common terminal and having outputs connected to said base terminals of said second and third transistors; a voltage divider means connected between said output terminal and said common terminal and having an output connected to said first input terminal of said differential amplifier; wherein a reference voltage is connected to said second input terminal of said differential amplifier; and wherein said collector terminal and emitter terminal of said first transistor are respectively connected to said first input terminal and output terminal and said base terminal of said first transistor is connected to said output of said differential amplifier and said collector terminal and emitter terminal of said second transistor are respectively connected to said output of said differential amplifier and said first input terminal; and wherein said collector terminal and said emitter terminal of said third transistor are respectively connected to said output of said differential amplifier and said second input terminal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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Specification