Heart pacemaker for avoiding pacemaker mediated tachycardia at mode switching

• US 4,802,483 A
• Filed: 03/05/1987
• Issued: 02/07/1989
• Est. Priority Date: 03/18/1986
• Status: Expired due to Term

• Current Assignee: Pacesetter AB
• Original Assignee: Siemens AG
• Inventors: Lindgren, Anders
• Primary Examiner(s): Jaworski, Francis J.
• Assistant Examiner(s): MANUEL, GEORGE C
• Application Number:
  US07/022,006
• Time in Patent Office: 705 Days
• Field of Search: 128/419 PG, 128/419 PT
• US Class Current: 607/14
• CPC Class Codes: A61B 5/6814 Head
• CPC Class Codes: A61N 1/3622 comprising two or more electrodes co-operating with different heart regions

Abstract

An atrial synchronous heart pacemaker has circuitry for stimulating the atrium and sensing atrial events and circuitry for stimulating the ventricle and sensing ventricular events, switching circuitry connected to the atrial and ventricular stimulation circuitry which switches between selected stimulation modes, including an atrial synchronous mode, upon the occurrence of a predetermined heart condition, and a delay element connected to the switching circuitry which delays switching to the atrial synchronous mode until after a selected delay following sensing of the predetermined heart condition which caused the switching to the atrial synchronous mode. The pacemaker is particularly suited for improving transition between a VVI pacing mode and a DDD pacing mode.

Claims

1. A heart pacemaker comprising:

means for stimulating the atrium and sensing atrial events;

means for stimulating the ventricle and sensing ventricular events;

switching means connected to said means for stimulating the atrium and to said means for stimulating the ventricle for switching between selected stimulation modes, including an atrial synchronous mode, upon the occurrence of a predetermined heart condition; and

delay means connected to said switching means for delaying switching to said atrial synchronous mode until after a selected delay following sensing of the predetermined heart condition which caused the switching to said atrial synchronous mode.

2. A heart pacemaker as claimed in claim 1, wherein said delay means is a delay means for delaying switching to said atrial synchronous mode until the occurrence of a second or later atrial signal following a most recent ventricular signal.

3. A heart pacemaker as claimed in claim 2, further comprising a P-wave counter which begins counting with the occurrence of said most recent ventricular event and which retains a first counter output until a selected number of counts, said counter connected to said means for stimulating the ventricle for enabling stimulation of the ventricle after the occurrence of selected number of counts.

4. A heart pacemaker as claimed in claim 1, wherein said delay means includes a time delay element for determining said selected delay.

5. A heart pacemaker as claimed in claim 4, wherein said time delay element is programmable.

6. A heart pacemaker as claimed in claim 4, wherein said time delay element has a time delay of at least 200 ms.

7. A heart pacemaker as claimed in claim 4, further comprising means for initially operating said heart pacemaker in an AV-sequential stimulation mode for the first pulse following switching to said atrial synchronous mode.

8. A heart pacemaker comprising:

means for stimulating the atrium and sensing atrial events;

means for stimulating the ventricle and sensing ventricular events;

switching means connected to said means for stimulating the atrium and said means for stimulating the ventricle for switching between an atrial synchronous stimulation mode and a non-atrial synchronous stimulation mode, said pacemaker normally operating in said atrial synchronous mode and said switching means switching to said non-atrial synchronous mode upon the occurrence of atrial events above a selected rate and switching back to said atrial synchronous mode when said atrial events fall below said selected rate; and

delay means connected to said switching means for delaying switching to said atrial synchronous mode until a selected time after said atrial events fall below said selected rate.

9. A heart pacemaker as claimed in claim 8, wherein said delay means delays switching to said atrial synchronous mode until the occurrence of a second atrial event following a most recent ventricular event.

17. A heart pacemaker as claimed in claim 8, wherein said switching means is switching means for switching between an atrial synchronous stimulation mode and a ventricle inhibited stimulation mode.

18. A heart pacemaker as claimed in claim 17, wherein said switching means is switching means for switching between an atrial synchronous stimulation mode and a VVI stimulation mode.

19. A heart pacemaker as claimed in claim 8, wherein said switching means is switching means for switching between a DDD stimulation mode and a non-atrial synchronous stimulation mode.

20. A heart pacemaker as claimed in claim 19, wherein said switching means is switching means for switching between a DDD stimulation mode and a VVI switching mode.

10. A heart pacemaekr comprising:

means for stimulating the atrial an sensing atrial events;

means for stimulating the ventricle and sensing ventricular events, said means having a control input;

switching logic connected to said means for stimulating the atrium and to said means for stimulating the ventricle, said switching logic normally operating said pacemaker on an atrial synchronous mode and being switchable to operate said pacemaker in a non-atrial synchronous mode;

control means for causing said switching logic to switch to said non-atrial synchronous mode if said atrial events occur faster than a selected rate and for causing said switching logic to switch back to said atrial synchronous mode when said atrial events occur below said selected rate; and

a P-wave counter having an output connected to said control input of said means for stimulating the ventricle and having inputs respectively connected to said means for stimulating the atrium and to said switching logic, said counter counting the number of atrial events occurring after said switching logic is switched back to said atrial synchronous mode after being in said non-atrial synchronous mode, and preventing stimulation of said ventricle until a selected number of atrial events have been counted.

11. A heart pacemaker as claimed in claim 10, wherein said selected number of atrial events is two.

12. A heart pacemaker as claimed in claim 10, wherein said switching logic is switching logic normally operating said pacemaker in an atrial synchronous mode and being switchable to operate said pacemaker in a ventricle inhibited mode.

13. A heart pacemaker as claimed in claim 12, wherein said switching logic is switching logic normally operating said pacemaker in an atrial synchronous mode and being switchable to operate said pacemaker in a VVI mode.

14. A heart pacemaker as claimed in claim 10, wherein said switching logic is switching logic normally operating said pacemaker in a DDD mode and being switchable to operate said pacemaker in a non-atrial synchronous mode.

15. A heart pacemaker as claimed in claim 14, wherein said switching logic is switching logic normally operating said pacemaker in a DDD mode and being switchable to operate said pacemaker in a VVI mode.

16. A heart pacemaker as claimed in claim 10, wherein said selected number of atrial events is greater than two.