Semiconductor device having MOSFET and deep polycrystalline silicon region
First Claim
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1. A semiconductor device comprising:
- a first semiconductor substrate region of a first conductivity type, formed in a substrate body,a pair of first source and drain regions of a second conductivity type opposite to said first conductivity type, said first source and drain regions being formed in said first substrate region, and separated from each other by a channel portion of said first substrate region to form a first MOSFET,a first gate electrode formed above said channel portion of said first substrate region, and insulated from said channel portion by a first gate insulating layer, anda first highly doped polycrystalline silicon region which is the same conductivity type as said first substrate region, and is formed in said first substrate region so that said first polycrystalline silicon region is in contact with said first substrate region, said first polycrystalline silicon region being deeper than said first source and drain regions, and being connected with said first source region to hold said first polycrystalline silicon region equipotential with said source region.
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Abstract
A semiconductor device such as a CMOS is provided with highly doped polycrystalline silicon regions for preventing undesired operations of parasitic transistors. Each polycrystalline region is extended deeper from a top surface of the silicon chip than source and drain regions of MOS transistors. In a substrate region of each MOS, one polycrystalline region of the same conductivity type as the substrate region is formed near the source region, and connected with said source region so that the polycrystalline region is held equipotential with the source region.
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Citations
19 Claims
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1. A semiconductor device comprising:
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a first semiconductor substrate region of a first conductivity type, formed in a substrate body, a pair of first source and drain regions of a second conductivity type opposite to said first conductivity type, said first source and drain regions being formed in said first substrate region, and separated from each other by a channel portion of said first substrate region to form a first MOSFET, a first gate electrode formed above said channel portion of said first substrate region, and insulated from said channel portion by a first gate insulating layer, and a first highly doped polycrystalline silicon region which is the same conductivity type as said first substrate region, and is formed in said first substrate region so that said first polycrystalline silicon region is in contact with said first substrate region, said first polycrystalline silicon region being deeper than said first source and drain regions, and being connected with said first source region to hold said first polycrystalline silicon region equipotential with said source region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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