Dual limit programmable linear signal limiter

• US 4,808,858 A
• Filed: 01/25/1988
• Issued: 02/28/1989
• Est. Priority Date: 01/25/1988
• Status: Expired due to Term

• Current Assignee: St Clair Intellectual Property Consultants Incorporated
• Original Assignee: Tektronix Incorporated (Fortive Corp.)
• Inventors: Stoops, John F.
• Primary Examiner(s): Zazworsky, John
• Application Number:
  US07/148,253
• Time in Patent Office: 400 Days
• Field of Search: 307/540, 307/544, 307/549, 307/551, 307/555, 307/559, 307/558, 307/560, 307/561, 307/565, 328/169, 328/172
• US Class Current: 327/322
• CPC Class Codes: H03K 5/08 by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding H03K5/07 takes precedence; comparing one pulse with another H03K5/22; providing a determined threshold for switching H03K17/30

Abstract

A current signal limiter provides precise minimum and maximum current limiting. Both maximum and minimum current limits are easily programmable. The signal limiter operates at maximum frequency response without inversion of the input signal. Current signal limiting is achieved by an NPN transistor biased in a common base configuration with the base coupled to a reference voltage source and the collector providing the output current, a series diode coupled to the emitter of the transistor for receiving a trickle current which prevents the transistor from turning off as well as setting a minimum current limit, and a diode matrix for receiving two reference currents and an input current. The diode matrix steers the input and reference currents to the transistor or to the reference voltage source, depending on the magnitude of the input and reference currents. The minimum and maximum current limits are programmable by adjusting the values of the reference currents and the trickle current.

Claims

1. A current limiter comprising:

a. a transistor having a base, a collector, and an emitter, the collector providing the output current, the base being coupled to a reference voltage source;

b. a series diode having an anode and a cathode, the anode being coupled to the emitter of said transistor to form a port for receiving a trickle current; and

c. a diode switching matrix coupled to the cathode of said series diode and coupled to the reference voltage source, said diode switching matrix having ports for receiving first and second reference currents, and an input current.

2. A current limiter as in claim 1 wherein the diode switching matrix comprises first, second, third, and fourth diodes each having an anode and a cathode, the cathode of the first diode being coupled to the anode of the second diode, the cathode of the second diode being coupled to the anode of the third diode and to the cathode of said series diode to form the first reference current port, the cathode of the third diode being coupled to the anode of the fourth diode and to the reference voltage source, and the cathode of the fourth diode being coupled to the anode of the first diode to form both the second reference current port and the input current port.

3. A current limiter as in claim 1 wherein the diode switching matrix comprises first, second, third, and fourth diodes each having an anode and a cathode, the cathode of the first diode being coupled to the anode of the second diode and to to the cathode of said series diode to form the first reference current port, the cathode of the second diode and the anode of the third diode being coupled to the reference voltage source, the cathode of the third diode being coupled to the anode of the fourth diode, the cathode of the fourth diode being coupled to the anode of the first diode to form both the second reference current port and the input current port.