Power DMOS transistor with high speed body diode

• US 4,811,065 A
• Filed: 06/11/1987
• Issued: 03/07/1989
• Est. Priority Date: 06/11/1987
• Status: Expired due to Term

• Current Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Original Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Inventors: Cogan, Adrian I.
• Primary Examiner(s): James, Andrew J.
• Assistant Examiner(s): Mintel, William A.
• Application Number:
  US07/061,352
• Time in Patent Office: 635 Days
• Field of Search: 357/23.4, 357/15, 357/59 I, 357/46, 357/52, 357/52 D, 357/86
• US Class Current: 257/328
• CPC Class Codes: H01L 27/0727 in combination with diodes, or capacitors or resistors
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode

Abstract

This inventive DMOS transistor provides faster turn-on switching than prior art lateral and vertical DMOS transistors in dV/dt situations and prevents catastrophic failures from high dV/dt'"'"'s. The preferred embodiment of this improved device combines a Schottky diode with a vertical DMOS transistor, within the semiconductor structure itself, to form a device equivalent to a Schottky diode in parallel with an N channel vertical DMOS transistor. The Schottky diode effectively replaces the body diode of the transistor when forward biasing voltages are applied to the DMOS transistor. Thus, the body diode is never forward biased and there is no recovery time associated with the body diode. This speeds up the turn-on of the DMOS transistor since there are no minority carriers in the P-N junction body diode to recombine. Also, the parasitic bipolar junction transistor (BJT), formed by the source, body region, and drain, cannot turn on, thus preventing second breakdown of the BJT.

Claims

1. An improved double diffused MOS (DMOS) transistor of the type including a semiconductor substrate having a top surface, a body region formed in said top surface of said substrate, a source region formed in said body region, a drain region formed in said substrate outside of said body region, a gate insulation layer formed over said top surface of said substrate between said source region and said drain region, and a control gate formed over said gate insulation layer, wherein the improvement comprises:

a monolithic Schottky diode including a metal anode in rectifying contact with said semiconductor substrate and in ohmic contact with said source region and body region of said DMOS transistor, said drain region acting as a cathode for said Schottky diode so that said Schottky diode is in parallel with said source region and said drain region of said DMOS transistor.

2. An improvement to a DMOS transistor as in claim 1 further comprising regions of a conductivity type opposite that of said substrate formed in said substrate and in contact with said metal anode of said Schottky diode in order to increase the breakdown voltage of said Schottky diode.

3. A semiconductor device comprising:

a substrate of a first conductivity type, having a bottom and top surface, a region of said bottom surface acting as a drain of a DMOS transistor;

a first region of a second conductivity type opposite to said first conductivity type formed in and on said top surface of said substrate, said first

region acting as a body region of said transistor;

a second region of said first conductivity type formed within said first region, said second region acting as a source of said transistor;

a channel region within said first region;

a control gate formed over and insulated from said channel region; and

a metal anode formed over and in ohmic contact with said first and second regions, excluding said channel region, and in rectifying contact with said top surface of said substrate, forming a Schottky diode with said substrate.

4. A semiconductor device as in claim 3 further comprising regions of said second conductivity type formed in and on said top surface of said substrate and in contact with said metal anode in order to increase the breakdown voltage of said Schottky diode.

5. A semiconductor device comprising:

a substrate of a first conductivity type, having a bottom and top surface;

a first region of a second conductivity type opposite to said first conductivity type formed in and on said top surface of said substrate, said first region acting as a body region of a DMOS transistor;

a second region of said first conductivity type formed within said first region, said second region action as a source of said transistor;

a third region of said first conductivity type formed in and on said top surface of said substrate, said third region acting as a drain of said transistor;

a channel region within said first region;

a control gate formed over and insulated from said channel region; and

a metal anode formed over and in ohmic contact with said first and second regions, excluding said channel region, and in rectifying contact with said top surface of said substrate, forming a Schottky diode with said substrate.

6. A semiconductor device as in claim 5 further comprising regions of said second conductivity type formed in and on said top surface of said substrate and in contact with said metal anode in order to increase the breakdown voltage of said Schottky diode.