Contactless technique for semicondutor wafer testing

• US 4,812,756 A
• Filed: 08/26/1987
• Issued: 03/14/1989
• Est. Priority Date: 08/26/1987
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Fung, Min-Su, Verkuil, Roger L., Curtis, Huntington W.
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): Burns, W.
• Application Number:
  US07/089,648
• Time in Patent Office: 566 Days
• Field of Search: 324/158 D, 324/158 R, 324/73 PC, 250/492.2, 250/492.21
• US Class Current: 324/754.27
• CPC Class Codes: G01R 15/165 measuring electrostatic potential, e.g. with electrostatic voltmeters or electrometers, when the design of the sensor is essential electrometers with passively moving electrodes G01R5/28; measuring electrostatic fields G01R29/12; measuring charge G01R29/24; measuring in circuits with high internal resistance G01R19/0023
• CPC Class Codes: G01R 31/2831 Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates G01R31/318511 takes precedence; testing during manufacture H01L22/00

Abstract

A contactless technique for semiconductor wafer testing comprising: depositing charges on the top surface of an insulator layer over the wafer to create an inverted surface with a depletion region and thereby a field-induced junction therebelow in the wafer, with an accumulated guard ring on the semiconductor surface therearound. The technique further includes the step of changing the depth to which the depletion region extends below the inverted semiconductor wafer surface to create a surface potential transient, and the step of measuring a parameter of the resultant surface potential transient. This technique may be utilized to make time retention and epi doping concentration measurements. It is especially advantageous for reducing the effects of surface leakage on these measurements. In a preferred embodiment, corona discharges are used to effect the charge deposition configuration. Either corona discharge or photon injection are used to change the depletion region depth.

Claims

1. A contactless measurement method for testing a doped wafer with an insulator layer disposed thereover, comprising the steps of:

depositing charges on the top surface of said insulator layer to create an inverted surface with a depletion region and thereby a field-induced junction in the wafer therebelow with an accumulated guard ring on the wafer surface;

changing the depth to which said depletion region extends below said inverted wafer surface to create a surface potential transition, and

measuring a parameter of the resultant surface potential transient between the top surface of said insulator layer and the bulk of said wafer.

2. A method as defined in claim 1, wherein said charge depositing step comprises the step of depositing charges by means of at least one corona discharge.

3. A method as defined in claim 2, wherein said depletion depth changing step comprises the step of applying a second corona discharge on the top surface of said insulator layer above said inverted surface area.

4. A method as defined in claim 3, wherein said measuring step comprises the step of measuring the time decay rate of said surface potential transient.

5. A method as defined in claim 4, wherein said depletion depth changing step comprises the step of applying a second corona discharge on the top surface of said insulator layer above said inverted surface area.

6. A method as defined in claim 1, wherein said depletion depth changing step comprises the step of imposing a forward bias pulse across said field-induced junction.

7. A method as defined in claim 6, wherein said pulse imposing step comprises the step of injecting photons into said depletion region to generate electron-hole pairs therein.

8. A method as defined in claim 1, wherein said depletion depth changing step includes the steps of

pulsing said wafer above said depletion region deeper into depletion relative to the steady state depletion resulting from said charge depositing step;

measuring the approximate instantaneous surface potential transient between the top surface of the insulator layer and the bulk of the semiconductor wafer; and

measuring said surface potential between said top surface of the insulator layer and the bulk of the semiconductor wafer after said instantaneous surface potential transient has substantially decayed.

9. A method as defined in claim 8, wherein said pulsing step comprises the step of depositing charges on to the top surface of said insulator layer above said field-induced junction to cause the depletion region in the semiconductor wafer to increase in depth.

10. A method as defined in claim 1, wherein said depletion depth changing step comprises the steps of:

pulsing said semiconductor wafer with a series of pairs of pulses, with each pulse in a given pulse pair changing the depth of said depletion region to a different depth;

measuring the approximate instantaneous surface potential after each pulse; and

calculating a doping profile for said semiconductor wafer.

11. A method as defined to claim 10, wherein said first and second pulse steps each comprise corona-discharge depositing charges on the top surface of said insulator layer above said inverted surface area.

12. A contactless measurement method for testing a doped semiconductor wafer with an insulator layer disposed thereover, comprising the steps of:

depositing a first corona discharge on the top surface of said insulator layer in a first area to accumulate said first area surface;

depositing a second corona discharge on the top surface of said insulator layer in a second area within and surrounded by said first area so that said first area provides an accumulated surface guard ring around said second area, said second corona discharge creating an inverted surface second area on said semiconductor wafer with a depletion region and thereby a field-induced junction in the wafer therebelow;

changing the depth to which said depletion region extends below said inverted semiconductor wafer surface; and

measuring a parameter of the resultant surface potential between the top surface of said insulator layer and the bulk of said semiconductor wafer.