Data processing peripheral subsystems having a controller and a plurality of peripheral devices
First Claim
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1. In a data processing system having a controller and one or more peripheral devices connected to the controller;
- the improvement including, in combination;
each said peripheral device having a data-handling unit for performing predetermined data processing operations and having electronic control circuits, including device-programmable means, connected to the data-handling unit for controlling the data-handling unit and for transferring data-representing signals with the data-handling unit;
the controller having electronic control circuits, including controller-programmable means, for controlling said peripheral device and for transferring said data-representing signals with said peripheral device;
connection means for coupling the electronic control circuits of said controller with the electronic control circuits of said peripheral devices for transferring said data-representing signals therebetween and for transferring control information therebetween;
a plurality of selection-connection-control means in said connection means separately and independently extending from the electronic control circuits in the controller to the respective electronic control circuits in said peripheral devices for sending a selection signal individually to but one of said peripheral devices;
data-transfer means in said connection means for transferring data-representing signals between the electronic control circuits of the controller and the electronic control circuits of said peripheral devices;
time-controlled information-transfer means in said connection means for transferring time-controlled information-representing signals between the electronic control circuits in said controller and in said peripheral devices;
device-gating means in each of said peripheral devices connected to said electronic control circuits of said each of said peripheral devices and to said time-controlled information-transfer means, to said data-transfer means and to all of said selection-connection-control means for responding to a selection signal received from a respective selection-connection-control means to pass signals between said connection means time-controlled information-transfer means and data-transfer means to and from the electronic control circuits of said each said peripheral device;
omni-connection-control means in said connection means for transferring predetermined control-information-representing signals including predetermined device commands between the electronic control circuits of any said peripheral devices and said controller independently of said selection signal;
status circuit means in said electronic control circuits of said peripheral devices connected to said omni-connection-control means for transferring status signals to the electronic control circuits of the controller independently of the selection signal and including device address information-bearing signals for indicating to the electronic control circuits of the controller the source of the status signals;
command means in the electronic control circuits of the controller connected to the omni-connection-control means for sending device commands with associated device addresses to all said peripheral devices connected to said omni-connection-control means independently of said selection signals;
status-receiving means in the electronic control circuits of said controller connected to said omni-connection-control means for receiving said status signals and having means for evaluating the received status signals;
command-executing means in the electronic control circuits of said peripheral device connected to the omni-connection-control means for receiving said predetermined device commands and associated device addresses and for responding to said device commands when the associated device address indicates the device, and connected to the data-transfer means and to said status-circuit means for activating the data-transfer means and the status-circuit means for transferring signals between the electronic control circuits in the controller and the electronic control circuits in said peripheral device;
said data-transfer means includes each of said peripheral devices data-format means for indicating predetermined data-format-reference indicia interposed between elements of data to be transferred between said electronic control circuits of said controller and the electronic control circuits of said devices which relate to a predetermined logic arrangement of the data as transferred within the respective said peripheral devices;
format-circuit means in each said peripheral device connected to said device-gating means and to said data-format means and to said selection-connection-control means for responding to the selection signal for transferring said indicated data-format-reference indicia to said controller electronic control circuits; and
write/read-circuit-control means in the controller connected to said device-gating means via said time-controlled information-transfer means for actuating same to transfer data signals between the electronic control circuits of a currently selected device and said controller electronic control circuits intermediate in time between successive ones of said indicated data-format-reference indicia.
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Abstract
A data recorder employs a disk record having a spiral track with either magnetically or optically sensible indicia. A normal mode of operation is to repeatedly scan one turn or circumvolution of the spiral track for emulating a circularly closed track. The recorder responds to received commands from a utilization device to tailor the disk access and recovery operations to the received command based upon command parameters and current status of the disk record. Electrical circuit and programming arrangements for effecting the controls are disclosed.
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Citations
16 Claims
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1. In a data processing system having a controller and one or more peripheral devices connected to the controller;
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the improvement including, in combination; each said peripheral device having a data-handling unit for performing predetermined data processing operations and having electronic control circuits, including device-programmable means, connected to the data-handling unit for controlling the data-handling unit and for transferring data-representing signals with the data-handling unit; the controller having electronic control circuits, including controller-programmable means, for controlling said peripheral device and for transferring said data-representing signals with said peripheral device; connection means for coupling the electronic control circuits of said controller with the electronic control circuits of said peripheral devices for transferring said data-representing signals therebetween and for transferring control information therebetween; a plurality of selection-connection-control means in said connection means separately and independently extending from the electronic control circuits in the controller to the respective electronic control circuits in said peripheral devices for sending a selection signal individually to but one of said peripheral devices; data-transfer means in said connection means for transferring data-representing signals between the electronic control circuits of the controller and the electronic control circuits of said peripheral devices; time-controlled information-transfer means in said connection means for transferring time-controlled information-representing signals between the electronic control circuits in said controller and in said peripheral devices; device-gating means in each of said peripheral devices connected to said electronic control circuits of said each of said peripheral devices and to said time-controlled information-transfer means, to said data-transfer means and to all of said selection-connection-control means for responding to a selection signal received from a respective selection-connection-control means to pass signals between said connection means time-controlled information-transfer means and data-transfer means to and from the electronic control circuits of said each said peripheral device; omni-connection-control means in said connection means for transferring predetermined control-information-representing signals including predetermined device commands between the electronic control circuits of any said peripheral devices and said controller independently of said selection signal; status circuit means in said electronic control circuits of said peripheral devices connected to said omni-connection-control means for transferring status signals to the electronic control circuits of the controller independently of the selection signal and including device address information-bearing signals for indicating to the electronic control circuits of the controller the source of the status signals; command means in the electronic control circuits of the controller connected to the omni-connection-control means for sending device commands with associated device addresses to all said peripheral devices connected to said omni-connection-control means independently of said selection signals; status-receiving means in the electronic control circuits of said controller connected to said omni-connection-control means for receiving said status signals and having means for evaluating the received status signals; command-executing means in the electronic control circuits of said peripheral device connected to the omni-connection-control means for receiving said predetermined device commands and associated device addresses and for responding to said device commands when the associated device address indicates the device, and connected to the data-transfer means and to said status-circuit means for activating the data-transfer means and the status-circuit means for transferring signals between the electronic control circuits in the controller and the electronic control circuits in said peripheral device; said data-transfer means includes each of said peripheral devices data-format means for indicating predetermined data-format-reference indicia interposed between elements of data to be transferred between said electronic control circuits of said controller and the electronic control circuits of said devices which relate to a predetermined logic arrangement of the data as transferred within the respective said peripheral devices; format-circuit means in each said peripheral device connected to said device-gating means and to said data-format means and to said selection-connection-control means for responding to the selection signal for transferring said indicated data-format-reference indicia to said controller electronic control circuits; and write/read-circuit-control means in the controller connected to said device-gating means via said time-controlled information-transfer means for actuating same to transfer data signals between the electronic control circuits of a currently selected device and said controller electronic control circuits intermediate in time between successive ones of said indicated data-format-reference indicia. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. In a disk-type data recorder for recording data signals on and sensing recorded data signals from a record disk having a spiral track for storing data signals and track-indicating signals along its length and with each circumvolution of the spiral being identifiable by respective index marks lying on a common radial line, each said circumvolution of the spiral including a track-switch zone and a plurality of like-sized data-storing sectors each with an embedded sector address, motive means for rotating the disk about an axis of rotation and data means including radially movable transducer means in operative association with said record disk for recording signals on and sensing signals recorded on the record disk;
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the improvement including, in combination; tracking-control means connected to said transducer means for actuating same to track-follow said spiral track and including concentric tracking means connected to said data means for receiving signals indicating that a one of said index marks has been sensed and actuating said transducer means to radially move to an adjacent circumvolution of the spiral track in said track-switch zone such that the same circumvolution of the spiral is repeatedly scanned by said transducer means; record-access means for indicating a desired access to said spiral track, for a given length of said spiral, beginning at a predetermined rotational position of a predetermined circumvolution of said spiral and for a given length of said spiral; command means connected to said tracking-control means and to said record-access means for responding to said indicated desired access for inhibiting said actuation of said transducer means whenever said indicated desired access includes access to portions of said spiral track on opposite sides of said respective index mark and said track-switch zone and along the length of the spiral track; and error-control means connected to said command means and to said tracking-control means and being responsive to said tracking-control means not indicating an index mark between any two successively adjacent circumvolutions of the spiral track during a desired access to said spiral track to enable said tracking-control means to access a given circumvolution of said spiral track immediately preceding a predetermined leading one of said two immediately adjacent convolutions and to inhibit said actuation of said transducer means while said transducer means is scanning said given any two successively adjacent circumvolutions of said spiral track whereby those portions of the spiral track immediately adjacent the nonindicated index mark can be assessed.
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10. In a first-addressable programmable machine, attachment circuits for connecting the first-addressable programmable machine to a second-addressable programmable machine, both of said programmable machines for concurrently performing data processing operations in synchronism, including in combination:
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a first set of terminals for carrying signals indicative of predetermined machine operational states existing between said programmable machines;
a second set of terminals for carrying signals indicative of predetermined control information to be transferred between said programmable machines relating to data processing functions to be performed by one of said programmable machines;a third set of terminals for carrying data-bearing signals and time-controlled information-bearing signals of said programmable machines for controlling the carrying of said data-bearing signals; a selection circuit connected to a first terminal of said first set for transferring a machine-selection signal to the second-addressable programmable machine and for indicating that a machine selection is active between said programmable machines and that said programmable machines are to jointly conduct predetermined data processing operations including carrying data-bearing signals over said third set of terminals; an alert circuit in a one of said addressable programmable machines for indicating a predetermined change in state in the one addressable programmable machine connected to a second terminal of said first set for transferring an alert signal over said second terminal for indicating to another of the addressable programmable machines that the predetermined change in state has occurred which requires predetermined machine operations to be performed by said another of said addressable programmable machines; a transmit circuit connected to a transmit terminal of said second set of terminals for transferring programmable-machine-address signals and said predetermined control information to said second programmable machine having the address of said transferred address signals such that the address transfer is independent of said selection circuit; a receive circuit connected to a receive terminal of said second set of terminals for receiving programmable-machine address signals and control information from said connected programmable machine and having an address detection circuit for detecting the received address for determining whether or not the received address indicates that the received predetermined control information is to be received by the receive circuit; a set of gate means having a plurality of gate means respectively connected to said terminals in said third set and said plurality of gate means being connected to said selection circuit for being enabled to pass said data-bearing signals and said time-controlled information-bearing signals to and from said third set of terminals whenever said selection circuit indicates that said selection is active; control-signal means connected to first ones of said plurality of gate means for transferring said time-controlled information-bearing signals with said first ones of said gate means when said selection is active in a predetermined time relationship to said data-bearing signals being passed through second ones of said gate means and to said data processing operations being jointly performed by both said programmable machines. - View Dependent Claims (11, 12, 13, 14, 15)
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16. In a method of operating a peripheral subsystem attachable to a host processor and having a plurality of addressable peripheral devices with a minimum of one addressable peripheral device in any subsystem, the steps of:
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over a first set of communication lines extending individually between the host processor and the peripheral devices sending state-control signals for establishing operating states in the peripheral subsystem and reporting the states of the subsystem to the host processor including selecting one of the peripheral devices for establishing a data-transfer state in the subsystem for the selected device; over a second set of communication lines extending between the host processor and all of the peripheral devices sending predetermined control signals with peripheral-device addresses identifying the peripheral device related to the respective predetermined control signals wherein each of the predetermined control signals relate to said data-transfer state and sending said predetermined control signals independently of whether or not said data-transfer state has been established in said peripheral subsystem for any one of the said peripheral devices; over a third set of communication lines extending between the host processor to all of the peripheral devices, sending data-bearing signals and time-controlled information-bearing signals in timed association with the data-bearing signals and in each of the peripheral devices passing such data-bearing signals and said time-controlled information-bearing signals only when said data-transfer state is established in the subsystem for the peripheral device; and in each of the devices, establishing signal indications of format indicia related to said data-bearing signals and supplying same to the host processor only when the subsystem is in said data-transfer state for the respective device.
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Specification