Remote environmental monitor system

• US 4,816,822 A
• Filed: 02/14/1986
• Issued: 03/28/1989
• Est. Priority Date: 02/14/1986
• Status: Expired due to Term

• Current Assignee: Sensitech Incorporated (Carrier Global Corporation)
• Original Assignee: Ryan Instruments Incorporated (Carrier Global Corporation)
• Inventors: Johnson, Jerry E., Vache, John P., Hocker, Lon O., Godley, John H.
• Primary Examiner(s): Weldon, Ulysses
• Application Number:
  US06/829,803
• Time in Patent Office: 1,138 Days
• Field of Search: 340/501, 340/587, 340/584, 340/693, 340/825.15, 340/310 R, 374/100, 374/104, 374/163, 374/170, 364/707, 364/709, 375/62, 73/431, 323/909, 323/323, 323/283, 307/135, 307/140, 307/141, 307/141.4, 361/383, 361/384, 346/33 TP
• US Class Current: 340/601
• CPC Class Codes: G01D 9/007 Data loggers attached to transport containers for perishable products, e.g. food or medicines
• CPC Class Codes: G01K 1/02 Means for indicating or recording specially adapted for thermometers

Abstract

An electronic measurement, data storage and readout system utilizing a programmable processor and controller to manipulate data measurements from a transducer is disclosed. Means are provided for electronically safeguarding the stored data. In the preferred embodiment means are also provided for reading out the data directly to a dedicated printer for producing graphical representations of the data and for converting the data to frequency-shift keyed signals which can be transmitted over telephone lines to the dedicated printer. A redeployment station is provided to reinitialize the programmable processor and controller.

Claims

1. A low power consumption, electronic monitoring and data storage system for remote monitoring of a condition over a period of time, comprising:

a transducer for generating an analog output signal indicative of the condition to be monitored;

an electrically powered converter operatively associated with the transducer to convert the analog signals to digital signals;

a memory for storing the digital signals as stored data;

a clock pulse generator for generating clock signals at a first frequency;

processing and controlling means, responsive to the clock signals, for processing the digital signals and for controlling the memory so that the digital signals representing the monitored condition at selected intervals during the time period are stored in the memory at selected time intervals, including means for reading out the stored signals at a later time and to provide a historical report of the monitored condition wherein the processing and controlling means is responsive to an externally applied second clock frequency signal, substantially different from the first clock frequency, to initialize the system so that the system will not record data beyond a selected time period without being initialized by a designated user to control use of the system by other users.

2. The system of claim 1 wherein the converter has a disabling input to reset the output of the converter to a default value when the disabling input is activated and wherein the system has timing means for activating the disabling input when the converter is powered so that the default value is received by the processing and controlling means when the second clock frequency signal is applied to the processing and controlling means.

3. The system of claim 2 wherein the timing means has a capacitor operatively connected to the disabling input to activate the disabling input when the second frequency is substantially higher than the first frequency.

4. The system of claim 3, wherein the timing means comprises a resistor-capacitor series pair having a time constant selected to activate the disabling input when the second higher frequency signal is applied.

5. The system of claim 1 wherein the processing and controlling means is a programmable microcomputer having complimentary metal-oxide semiconductor architecture to minimize current consumption of the system and including power reducing means, controlled by the processing and controlling means, for reducing the power demand of the converter so that the power consumption of the system is substantially reduced between the selected time intervals.

6. The system of claim 1 including a dedicated printer having means for interfacing with the processing and controlling means and having means for generating the second frequency to activate the disabling converter input.

7. The system of claim 6 wherein the printer interfacing means also interfaces with the clock and wherein the frequency of the second frequency generating means is substantially greater than the first frequency and the clock is overdriven by the second frequency generating means.

8. The system of claim 6 wherein the dedicated printer has means for instructing the processing and controlling means to load data into the memory from the dedicated printer.

9. The system of claim 6 wherein the dedicated printer has means for producing a paper chart having a graphical representation of the stored digital signals versus time.

10. The system of claim 9 including a substantially transparent overlay sized for superimposition over the paper chart wherein the overlay has color coded sections to indicate data values outside of a desired range.

11. The system of claim 1 including a redeployment station having means for interfacing with the processing and controlling means and having means for generating the second frequency to activate the disabling converter input.

12. The system of claim 11 wherein the redeployment station has means for checking the calibration of the transducer.

13. The system of claim 12 wherein the redeployment station has a bar code reader.

14. A low power consumption, electronic monitoring and data storage system for remote monitoring of a condition over a period of time, comprising:

a transducer for generating an analog output signal indicative of the condition to be monitored;

an electrically powered converter operatively associated with the transducer to convert the analog signals to digital signals;

a memory for storing the digital signals as stored data;

a clock pulse generator for generating clock signals at a first frequency;

processing and controlling means, responsive to the clock signals, for processing the digital signals and for controlling the memory so that the digital signals representing the monitored condition at selected intervals during the time period are stored in the memory at selected time intervals, including means for reading out the stored signals at a later time and to provide a historical report of the monitored condition wherein the processing and controlling means includes a data output line and wherein the processing and controlling means reads out the stored data serially as serial output data words on a data output line and wherein the system further includes a frequency shift keyed modulator operatively associated with the processing and controlling means, data output line and clock for receiving the serial output data words and for converting the serial output data words to frequency shift keyed signals, and means, associated with the modulator, for generating an audible signal therefrom, wherein the frequency shift keyed modulator produces six cycles of logical true signals and three cycles of logical false signals for each serial data output word from the processing and controlling means.

15. The system of claim 14 wherein the first frequency for the clock pulse generator is approximately 32.768 KHz and wherein the frequency shift keyed modulator has means for dividing the clock pulse by 16 and 32 to provide logical true and logical false signals of approximately 2048 Hz and 1028 Hz, respectively.

16. The system of claim 15 wherein the frequency shift keyed modulator comprises;

a shift register, responsive to the clock signals and having a divide-by-16 output and a divide-by-32 output to divide the clock first frequency;

a first two input NAND gate having one input connected to the divide-by-32 output and having the second input connected to the data output line through an inverter to provide the logical false frequency shift keyed signals;

a second two input NAND gate having one input connected to the divide-by-16 output and having the second input directly connected to the data output line to provide the logical true frequency shift keyed signals; and

a two input OR gate having one input connected to the output of the first NAND gate through an inverter and having the second input connected to the output of the second NAND gate through an inverter, the output of the OR gate being operatively associated with the audible signal generating means.