Integrated, microminiature electric-to-fluidic valve and pressure/flow regulator

• US 4,821,997 A
• Filed: 09/16/1987
• Issued: 04/18/1989
• Est. Priority Date: 09/24/1986
• Status: Expired due to Term

• Current Assignee: Board of Trustees of the Leland Stanford Junior University (Stanford Management Co.)
• Original Assignee: Board of Trustees of the Leland Stanford Junior University (Stanford Management Co.)
• Inventors: Zdeblick, Mark
• Primary Examiner(s): Chambers, A. Michael
• Assistant Examiner(s): Fox, John C.
• Application Number:
  US07/097,494
• Time in Patent Office: 580 Days
• Field of Search: 137/9, 137/10, 137/486, 251/11, 73/204, 357/26, 357/28, 338/22, 338/22 SD, 338/23, 338/24
• US Class Current: 251/11
• CPC Class Codes: F15C 3/04 using diaphragms using loose plates or foils F15C3/005; connection of valves to inflatable elastic bodies B60C29/00
• CPC Class Codes: F15C 5/00 Manufacture of fluid circuit elements; Manufacture of assemblages of such elements integrated circuits
• CPC Class Codes: F16K 2099/0074 using photolithography, e.g. etching
• CPC Class Codes: F16K 2099/008 Multi-layer fabrications
• CPC Class Codes: F16K 2099/0084 Chemistry or biology, e.g. "lab-on-a-chip" technology
• CPC Class Codes: F16K 2099/009 Fluid power devices
• CPC Class Codes: F16K 99/0001 Microvalves microdevices B81B1/00; manufacture or treatment of devices or systems in or on a substrate B81C1/00; microfluidic structures B01L3/5027; micropumps F04B19/006
• CPC Class Codes: F16K 99/0015 Diaphragm or membrane valves
• CPC Class Codes: F16K 99/0044 using thermo-electric means
• CPC Class Codes: F16K 99/0061 actuated by an expanding gas or liquid volume
• CPC Class Codes: G02B 3/14 of variable focal length
• CPC Class Codes: H01L 21/30608 Anisotropic liquid etching H01L21/3063 takes precedence
• CPC Class Codes: Y10T 137/7759 Responsive to change in rate of fluid flow

Abstract

There is disclosed herein an apparatus for converting control signals of an electrical or optical nature or any other type of signal which may be converted to a change of temperature of a fixed volume of material trapped in a chamber to flexure of a membrane forming one wall of the chamber. Typically, the device is integrated onto a silicon wafer by anisotropically etching a trench into said wafer for enough that a thin wall of silicon remains as the bottom wall of the trench. In some embodiments, polyimide is used as the material for the membrane. The trench is then hermetically sealed in any one of a number of different ways and the material to be trapped is either encapsulated during the sealing process or later placed in the cavity by use of a fill hole. Typically, a resistor pattern is etched on the face of pyrex wafer used as a top for the trench to form the cavity. When current is passed through this resistor, the material in the cavity is heated, its vapor pressure increases and expansion occurs. There is also disclosed herein a pressure regulator and a flow regulator each of which are integrated on a single die using the valve structure disclosed herein.

Claims

1. An integrated flow regulator comprising:

a first wafer having first and second surfaces, said second surface of said first wafer having a first resistive pattern formed thereon at a first location and having terminal means coupled to said resistive pattern for coupling said resistor pattern to a source of electrical power;

a second wafer having first and second surfaces, said first surface of said second wafer having a trench formed therein having a depth sufficient to form a flexible diaphragm between the bottom of said trench and said second surface of said second wafer, said first surface of said second wafer being bonded to said first wafer so that said trench forms a sealed cavity which contains said first resistor pattern;

a material trapped in said cavity which has a boiling point above any ambient temperature that will be experienced but low enough that heating caused by passing of electrical current to said first resistor pattern will cause said material to boil and raise the vapor pressure in said cavity sufficiently to expand said diaphragm;

a third wafer having first and second surface, said first surface of said third wafer having an input channel and an output channel formed therein and having a valve seat formed therein in the form of a wall separating said input channel from said output channel, said valve seat formed in a location such that said diaphragm, when expanded, contacts said valve seat to control the flow from said input channel to said output channel, said first surface of said third wafer being bonded to said second wafer at predetermined points not including the points of contact between said valve seat and said diaphragm, said output channel being located so as to be in fluid communication with a flow channel formed between said first and said second wafers; and

resistor means formed in said flow channel for supplying heat to any fluid flowing said flow channel when current is passed through said resistor;

first and temperature sensing means formed in said flow channel at first and second locations, respectively, such that heat diffusing through any fluid flowing in said flow channel must diffuse in a direction which is upstream to reach said first temperature sensing means, and must diffuse in a direction which is downstream to reach said second temperature sensing means.

2. An integrated flow regulator comprising:

an integrated valve comprising;

a first pyrex wafer;

a second silicon wafer having first and second parallel surfaces, said first surface having a trench etched therein deep enough to leave a flexible diaphragm defined by a bottom surface of said trench and said second surface, said first surface being anodically bonded to said first wafer such that said trench is sealed to form a cavity;

a material trapped in said cavity which has a boiling point above the highest ambient temperature which might be experienced by said integrated flow regulator;

heating means coupled to said trapped material for selectively raising the temperature of said trapped material to said boiling point to cause the vapor pressure in said cavity to rise to a level sufficient to flex said diaphragm, said heating means comprising resistive material deposited on said first surface of said first pyrex wafer at a location such that said serpentine pattern will be included within the perimeter of said cavity when said first pyrex wafer is bonded to said second silicon wafer such that when current is passed through said resistive material, said trapped material is heated by the power dissipation in said resistive material;

a second pyrex wafer having first and second parallel surfaces, said first surface of said second pyrex wafer having an input channel and an output channel and a wall having a valve seating surface etched therein, said input channel and said output channel being separated from each other by said wall and valve seating surface, said input channel and said output channel each being etched as a plurality of projecting finger trenches which are interdigitated, and wherein said valve seating surface and wall takes the form of a serpentine mesa which occupies the space between and separates said projecting finger trenches of said input channel and said output channel, said first surface of said second pyrex wafer being anodically bonded to said second surface of said silicon wafer such that said diaphragm seals against said valve seating surface when the vapor pressure in said cavity is sufficiently raised, said bonding being at all points except where said diaphragm mates with said valve sealing surface, said valve seating surface being coated with a layer of material which prevents anodic bonding between said first surface of said second pyrex wafer and said second surface of said silicon wafer at points on said valve seating surface;

a flow channel defined by a gap between said first and second pyrex wafers not occupied by said second silicon wafer, said flow channel being in fluid communication with said output channel of said integrated valve; and

first, second and third electrically isolated, electrically resistive patterns formed on a surface of one of said first or second pyrex wafers, at least two of said resistive patterns being comprised of a material which changes resistivity with changing temperature, said first, second and third resistive patterns arranged in said flow channel such that heat from power dissipated in one of said resistive patterns must travel upstream in fluid flowing in said flow channel to reach one of said resistive patterns which changes resistivity with changing temperature and must travel downstream in fluid flowing in said flow channel to reach the other of said resistive patterns which changes resistivity with changing temperature.