Dual channel current mode switching regulator

• US 4,825,144 A
• Filed: 11/10/1987
• Issued: 04/25/1989
• Est. Priority Date: 11/10/1987
• Status: Expired due to Term

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Alberkrack, Jade H., Pace, W. David
• Primary Examiner(s): Salce, Patrick R.
• Assistant Examiner(s): KINCAID, KRISTINE LYNN
• Application Number:
  US07/118,927
• Time in Patent Office: 532 Days
• Field of Search: 323/266, 323/267, 323/272, 363/71, 363/131
• US Class Current: 323/272
• CPC Class Codes: H02M 1/008 Plural converter units for generating at two or more independent and non-parallel outputs, e.g. systems with plural point of load switching regulators
• CPC Class Codes: H02M 3/28 using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
• CPC Class Codes: H02M 7/48 using discharge tubes with control electrode or semiconductor devices with control electrode
• CPC Class Codes: H03K 17/0822 in field-effect transistor switches

Abstract

A dual channel switching regulator is disclosed comprising a pair of current mode pulse width modulated controllers synchronized to a single oscillator with the input of the first one of pair of controllers being directly coupled to the oscillator while the input of the second one of the pair of controllers is coupled via an inverter to the output of the oscillator. The pair of controllers are thus operated on alternate half cycles of the output of the oscillator such that the turn off transients of one controller does not affect the other and vice versa. Hence, the switching regulator provides two independent regulated output voltages from an unregulated source.

Claims

1. A dual channel current mode switching regulator for providing two independent output control currents at respective outputs at which first and second load utilization means are connected, each of the first and second load utilization means including a control transistor, comprising:

a first controller circuit for providing the first one of the output control currents at a first one of the outputs of the regulator, said first controller circuit having first and second inputs and an output, said output being coupled to the first output of the regulator, said first input being coupled to a first input of the regulator for receiving a first feedback signal the magnitude of which is proportional to the current flowing through the control transistor of the first load utilization means, said first controller circuit including a comparator for comparing the magnitude of a first error voltage generated from the first load utilization means to said magnitude of said first feedback signal such that the first output control current is terminated whenever said magnitude of said first feedback signal exceeds said magnitude of said first error voltage;

a second controller circuit for providing the second of the output control currents at a second one of the outputs of the regulator, said second controller circuit having first and second inputs and an output, said output being coupled to the second output of the regulator, said first input being coupled to a second input of the regulator for receiving a second feedback signal the magnitude of which is proportional to the current flowing through the control transistor of the second load utilization means, said second controller circuit including a comparator for comparing the magnitude of an error voltage generated from the second load utilization means to said magnitude of said second feedback signal such that the second output control current is terminated whenever said magnitude of said second feedback signal exceeds said magnitude of said second error voltage;

an oscillator for providing a single predetermined duty cycle oscillation signal at an output thereof, said output being coupled to said second input of said first controller circuit; and

an inverter coupled between said output of said oscillator and said second input of said second controller circuit for inverting the oscillation signal supplied thereto such that said first and second controller circuits are rendered operative on alternating cycle of said oscillation signal.

2. A switching regulator for providing separate control operation of two independently operated load control transistors, comprising:

an oscillator for providing a single periodic oscillation signal at an output;

circuit means coupled to said oscillator output for inverting said oscillation signal;

a first controller circuit responsive to said oscillation signal for providing a first control signal at an output to control the conduction of the first one of the load control transistors, said first controller circuit including circuit means for comparing the magnitude of a first variable error voltage to a first feedback signal derived from current flow through said first load control transistor to provide a second control signal at said output which terminates the conduction of said first load control transistor whenever the magnitude of said first feedback signal exceeds the magnitude of said first error voltage; and

a second controller circuit responsive to said inverted oscillation signal for providing a first control signal at an output to control the conduction of the second of the load control transistors, said second controller circuit including circuit means for comparing the magnitude of a second variable error voltage to a second feedback signal derived from current flow through said second load control transistor to provide a second control signal at said output which terminates the conduction of said second load control transistor whenever the magnitude of said second feedback signal exceeds the magnitude of said second error voltage.