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Method of making a field effect transistor with overlay gate structure

  • US 4,839,304 A
  • Filed: 12/17/1987
  • Issued: 06/13/1989
  • Est. Priority Date: 12/18/1986
  • Status: Expired due to Term
First Claim
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1. A process of fabricating a metal-semiconductor type field effect transistor, comprising the steps of :

  • (a) preparing s semi-insulating substrate with a surface having a gate forming area and a remaining area;

    (b) forming a gate electrode on the gate forming area of the surface of said semi-insulating substrate, said gate electrode having an upper surface and side walls;

    (c) forming a protection film on the upper surface and the side walls of said gate electrode and the remaining area of the surface of said semi-insulating substrate;

    (d) covering said protection film with a material which is different in etching rate from said protection film;

    (e) forming a filling layer of said material for creating a generally smooth topography by removing a part of said material over said gate electrode and a part of said protection film on the upper surface of said gate electrode, said filling layer having an upper surface substantially coplanar to the upper surface of said gate electrode;

    (f) forming a conductive layer on the upper surface of said gate electrode and the upper surface of said filling layer; and

    (g) removing said filling layer so as to cause said conductive layer to be spaced from a part of said protection film on the remaining area of the surface of said semi-insulating layer.

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