Information transfer system for transferring binary information
First Claim
1. An information transfer system for transferring binary information between a central unit and a plurality of modular peripheral assemblies via a bus system, wherein the bus system comprises a serial ring, and further comprises an interface unit comprising a shift register of said serial ring associated with each peripheral assembly which permits parallel tranfer of the binary information between each peripheral assembly and the bus system, each said interface unit being disposed in the serial ring and having parallel outputs and inputs coupled to a respective peripheral assembly, said bus system further comprising a plurality of control lines for controlling said interface units, each said interface unit comprising two sub-units, each sub-unit comprising four information bits, and further comprising first switching means provided at terminal ends of each interface unit allowing serial outputs and inputs of said interface units to be coupled together to form a ring shift register, and further comprising second switching means provided at said terminal ends for coupling said interface units together to form an enlarged ring shift register.
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Accused Products
Abstract
An information transfer system for transferring binary information between a central unit and modular peripheral assemblies via a bus system. The bus system is designed as a serial ring shift register. An interface unit which permits parallel transfer of the individual binary information is interposed between the peripheral assembly and the bus.
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Citations
22 Claims
- 1. An information transfer system for transferring binary information between a central unit and a plurality of modular peripheral assemblies via a bus system, wherein the bus system comprises a serial ring, and further comprises an interface unit comprising a shift register of said serial ring associated with each peripheral assembly which permits parallel tranfer of the binary information between each peripheral assembly and the bus system, each said interface unit being disposed in the serial ring and having parallel outputs and inputs coupled to a respective peripheral assembly, said bus system further comprising a plurality of control lines for controlling said interface units, each said interface unit comprising two sub-units, each sub-unit comprising four information bits, and further comprising first switching means provided at terminal ends of each interface unit allowing serial outputs and inputs of said interface units to be coupled together to form a ring shift register, and further comprising second switching means provided at said terminal ends for coupling said interface units together to form an enlarged ring shift register.
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18. A method for detecting and correcting an interruption of a data ring of an information transfer system for transferring binary information between a central unit and a plurality of modular peripheral assemblies via a bus system wherein the bus system comprises a serial ring and further having an interface unit comprising a shift register of said serial ring associated with each peripheral assembly which permits parallel transfer of the binary information between each peripheral assembly and the bus system, each said interface unit being disposed in the serial ring and having a serial input and serial output connected in the serial ring and parallel outputs and inputs coupled to a respective peripheral assembly, said bus system further comprising a plurality of control lines for controlling said interface units, and further comprising means for obtaining a predetermined signal state which is operative if a shift register is removed from the data ring, wherein, if a shift register is removed from the data ring and if the predetermined signal state become effective, the central unit recognizes the interruption by means of the signal state and carries out an identification cycle for reactiving a switched-off sub-unit in the interface without influencing starting signal states on the data ring.
- 19. A method for transferring binary information between a central unit and a plurality of modular peripheral assemblies via a bus system wherein the bus system comprises a serial ring and further having an interface unit comprising a shift register of said serial ring associated with each peripheral assembly which permits parallel transfer of the binary information between each peripheral assembly and the bus system, each said interface unit being disposed in the serial ring and having a serial input and serial output connected in the serial ring and parallel outputs and inputs coupled to a respective peripheral assembly, said bus system further comprising a plurality of control lines for controlling said interface units, wherein the central unit makes information serially transferred via the bus system available to the interface units from a loading memory and further having a further memory wherein state data of the peripheral assemblies is loaded simultaneously, program processing taking place subsequently, the binary information being transferred from the peripheral assemblies before and after the serial transfer.
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22. A method for bidirectional information transfer on a line wherein a shift register cell of a serial ring shift register is coupled to an intermediate memory and an output of the memory is coupled to an input of a tristate amplifier, with an output of the tristate amplifier being coupled back to the shift register cell by a read amplifier comprising switching the tristate amplifier to its tristate condition when a control signal is supplied to the tristate amplifier and activating said read amplifier.
Specification