PWM inverter system

• US 4,847,743 A
• Filed: 05/19/1988
• Issued: 07/11/1989
• Est. Priority Date: 05/20/1987
• Status: Expired due to Fees

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Kamiyama, Isao
• Primary Examiner(s): Wong, Peter S.
• Application Number:
  US07/195,801
• Time in Patent Office: 418 Days
• Field of Search: 363/41, 363/56, 363/97, 363/98, 363/132
• US Class Current: 363/41
• CPC Class Codes: H02M 7/53875 with analogue control of three-phase output
• CPC Class Codes: H02M 7/53876 based on synthesising a desired voltage vector via the selection of appropriate fundamental voltage vectors, and corresponding dwelling times
• CPC Class Codes: H02M 7/5395 by pulse-width modulation

Abstract

A PWM inverter system which eliminates a switching loss and minimizes the distortion ratio of the output voltage thereof. The PWM inverter system includes a first means for producing switching signals for 3-phase modulation by which switching elements for each phase make a switching operation, a second means for producing switching signals for 2-phase modulation by which a switching operation for one phase is unnecessary, and a change-over for changing over the two means in response, for example, to a magnitude value of the inverter output voltage.

Claims

1. A PWM inverter system which includes a controlling means for receiving a dc voltage and for controlling two groups of switching elements a first group of said switching elements having ine end of each switching element connected to the positive side of said dc voltage and a second group of said switching elements having one end of each switching element connected to the negative side and said dc voltage and wherein in one condition in which all of said first group of switching elements are in the on state at the same time, and in another condition in which all of said second group of switching elements are in the on state at the same time, and a further condition in which all of said switching elements of said first group of said switching elements and said second group of said switching elements are not in the on state at the same time are combined and the duration of the output voltage, comprising a first means for producing switching signals by which, while the switching elements for each phase make a switching operation once, the switching elements for another phase may be switched at least once, a second means for producing switching signals by which there is at least one phase for which a switching operation is not effected while a switching operation is effected for any other phase, and a change-over means for changing over between said first means and said second means.

2. A PWM inverter system according to claim 1, wherein said change-over means makes a changing over operation in response to a parameter of operation of the inverter.