Power supply switch for wafer scale applications

• US 4,849,847 A
• Filed: 12/21/1987
• Issued: 07/18/1989
• Est. Priority Date: 12/02/1985
• Status: Expired due to Term

• Current Assignee: Northrop Grumman Corporation
• Original Assignee: George W. Mciver, James B. Cho
• Inventors: Cho, James B., McIver, George W.
• Primary Examiner(s): Pellinen, A. D.
• Assistant Examiner(s): DEBOER, TODD
• Application Number:
  US07/135,476
• Time in Patent Office: 575 Days
• Field of Search: 361/42, 361/45, 361/60, 361/54-58, 361/86, 361/88-91, 361/93, 361/94, 361/100, 361/101, 307/296 R, 340/649-651, 340/662, 340/663, 324/73 PC, 324/51, 323/276-279, 371/15, 371/21, 371/24
• US Class Current: 361/88
• CPC Class Codes: G06F 11/0754 by exceeding limits
• CPC Class Codes: G11C 2029/5006 Current
• CPC Class Codes: G11C 29/006 at wafer scale level, i.e. wafer scale integration [WSI]
• CPC Class Codes: G11C 29/025 in signal lines
• CPC Class Codes: G11C 29/12 Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
• CPC Class Codes: G11C 29/12005 comprising voltage or current generators
• CPC Class Codes: G11C 5/14 Power supply arrangements , e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels

Abstract

An adjunct switch circuit is provided for detecting power to ground leaks in a portion of a chip circuit and for disabling such circuit portion in the event of a leak. The switch circuit of the invention is particularly useful for Wafer Scale Integration, and is conveniently employed in the testing of chip circuits following manufacturing.

In a preferred embodiment, the switch circuit includes a power supply, including a voltage source and a ground, a reset line for receiving a reset pulse, a first switch, connected in series with one of the power supply lines to the circuit portion ground and inversely responsive to both the reset pulse and the state of the circuit portion ground following termination of the reset pulse, and a second switch, connected between ground and the circuit portion ground and directly responsive to the reset pulse to leak current from the circuit portion ground to ground when turned on by the reset pulse.

Claims

1. A power supply switch circuit formed as complementary metal-oxide semiconductor (CMOS) circuitry and used in detecting power-to-ground leaks in a portion of a semiconductor chip circuit, the power supply switch comprising:

(a) first and second power input lines used in supplying power to a portion of a semiconductor circuit;

(b) a reset line, used in receiving a reset signal pulse used to initiate detection of ground leakage currents from the circuit portion;

(c) first CMOS switch means, including a first switch connected in series with one of the first and second power input lines, the first switch means functioning to open the first switch in response to the presence of a reset signal pulse on the reset line;

(d) second CMOS switch means functioning in response to the presence of the reset pulse, to generate a control signal indicative of whether the voltage across the first switch in its open condition exceeds a predetermined threshold; and

(e) means connecting the control signal generated by the second CMOS switch means to the first CMOS switch means, which functions to leave the first switch open at the end of the reset pulse if the voltage across the first switch in its open condition exceeds the predetermined threshold.

2. The switch circuit of claim 1 in which one of the power lines is a ground line and the first switch is connected in series with the ground line.

3. The switch circuit of claim 1 in which one of the power lines is a ground line and the first switch is connected in series with the power line that is not the ground line.

4. A power supply switch circuit used in detecting power-to-ground leaks in a portion of a semiconductor chip circuit, the power supply switch comprising:

(a) first and second power input lines used in supplying power to a portion of a semiconductor circuit;

(b) a reset line, used in receiving a reset signal pulse used to initiate detection of ground leakage currents from the circuit portion;

(c) first switch means, including a first switch connected in series with one of the first and second power input lines, the first switch means functioning to open the first switch in response to the presence of a reset signal pulse on the reset line;

(d) second switch means functioning in response to the presence of the reset pulse, to generate a control signal indicative of whether the voltage across the first switch in its open condition exceeds a predetermined threshold; and

(e) means connecting the control signal generated by the second switch means to the first switch means, which functions to leave the first switch open at the end of the reset pulse if the voltage across the first switch in its open condition exceeds the predetermined threshold;

and wherein the first switch means includes a logic gate performing an AND function and having one input derived from the reset line and one input derived from the control signal from the second switch means, and an output coupled to the first switch, to switch it to the closed condition only when the inputs indicate that the reset signal pulse is complete and that the voltage across the first switch in the open condition did not exceed the predetermined threshold.

5. A power supply switch circuit formed as complementary metal-oxide semiconductor (CMOS) circuitry and used in detecting power-to-ground leaks in a portion of a semiconductor chip circuit, the power supply switch comprising:

(a) first and second power input lines used in supplying power to a portion of a semiconductor circuit;

(b) a reset line, used in receiving a reset signal pulse used to initiate detection of ground leakage currents from the circuit portion;

(c) first CMOS switch means, including a first switch connected in series with one of the first and second power input lines, the first switch means functioning to open the first switch in response to the presence of a reset signal pulse on the reset line;

(d) second CMOS switch means functioning in response to the presence of the reset pulse, to generate a control signal indicative of whether the voltage across the first switch in its open condition exceeds a predetermined threshold; and

(e) means connecting the control signal generated by the second CMOS switch means to the first CMOS switch means, which functions to leave the first switch open at the end of the reset pulse if the voltage across the first switch in its open condition exceeds the predetermined threshold;

and wherein the second CMOS switch means includes delay means to ensure that the control signal is still available at the first switch means after termination of the reset signal pulse.

6. A power supply switch circuit used in detecting power-to-ground leaks in a portion of a semiconductor chip circuit, and adapted to disable the circuit portion upon the detection of such leaks, the power supply switch comprising:

(a) a power input line and a ground line, used in supplying power to a portion of a semiconductor chip circuit;

(b) a reset line, used in receiving a reset signal pulse used to initiate detection of ground leakage currents from the circuit portion;

(c) first switch means, including a first switch connected in series between the ground line and a ground terminal of the circuit portion, the first switch means functioning to open the first switch in response to the presence of a reset signal pulse on the reset line;

(d) second switch means functioning in response to the presence of the reset pulse, to generate a control signal indicative of whether the voltage across the first switch in its open condition exceeds a predetermined threshold; and

(e) means connecting the control signal generated by the second switch means to the first switch means, which functions to leave the first switch open at the end of the reset pulse if the voltage across the first switch in its open condition exceeds the predetermined threshold;

(f) first switch turn-on means included in the first switch means, and responsive to the control signal and the simultaneous absence of the reset signal pulse, to turn on the first switch if the voltage across it in the open condition does not exceed the threshold value; and

(g) delay means included in the second switch means, used in delaying the control signal to ensure that it will persist after the reset signal has terminated, the delay means including a first inverter ratioed to turn over at the predetermined voltage threshold, a second inverter to recondition the control signal, a third inverter ratioed to delay the signal a predetermined time, and a capacitive element adapted to store the state of the control signal.

7. The switch circuit of claim 6 in which the reset signal pulse has a voltage approximately that of the voltage source and a duration of less than about 1 msec.

8. The switch circuit of claim 6 in which the predetermined voltage threshold is about 1.5 volts.

9. The switch circuit of claim 6 in which the predetermined time is greater than about 6 nanoseconds.

10. A method of testing a portion of a chip circuit on a substrate, referred to in this claim as a circuit portion, to determine if the circuit portion evidences a power-to-ground leak, and to isolate the circuit portion in the event a leak is detected, the method comprising:

(a) receiving a reset pulse of a predetermined voltage and duration;

(b) as a result of the reset pulse, turning off a first switch connected in series with a power supply line to the circuit portion, thereby disconnecting the circuit portion from the power supply, and turning on a second switch connected in parallel with the first switch, thereby permitting any charge accumulated on the power supply line to the circuit portion to discharge through the second switch;

(c) following the reset pulse, storing the inverted state of the power supply line to the circuit portion;

(d) feeding the stored inverted state of the power supply line to a first input line;

(e) feeding the inverted state of the reset pulse to a second input line;

(f) if both input lines are in a "high" condition, indicating that a voltage on the supply line to the circuit portion is below a preset value and the reset pulse is off, generating a signal to turn on the first switch, to reconnect the power supply line to the circuit portion; and

(g) if the first input line is in a "low" condition, indicating that a voltage on the supply line to the circuit portion is above the preset value, thus constituting a leak condition, then maintaining the first switch in an off state, thereby maintaining the disconnected condition and disabling the circuit portion.

11. A power supply switch circuit used in detecting power supply leakages in a semiconductor circuit module and for shutting off power to the module upon detection of such a leakage, the power supply switch comprising:

(a) a power supply connected to the module;

(b) a first switch connected in series with the power supply line;

(c) a second switch connected in parallel with the first switch;

(d) means responsive to a reset pulse used in switching the first switch to the off state and the second switch to the on state for the duration of the reset pulse;

(e) means operative during the reset pulse, used in generating a control signal indicative of whether the voltage across the first switch in the off state exceeds a preselected threshold value; and

(f) logic means responsive to the control signal and to the reset pulse, switching the first switch on at the end of the reset pulse only if the voltage across the first switch in the off state is below the threshold value, indicating no detected leaks.

12. A power supply switch circuit as defined in claim 11, wherein the means for generating a control signal includes:

delay means to ensure that the control signal is available to the logic means immediately after the end of the reset pulse.

13. A power supply switch circuit as defined in claim 11, wherein the logic means includes:

a NOR gate having a first input derived from the reset pulse such that the first input is in a "low" condition if the reset pulse has ended, a second input derived from the control signal such that the second input is in a "low" condition if the detected voltage across the first switch in the off state is below the threshold value, and an input that is in a "high" condition, for switching the first switch on, only if both of the inputs are "low."

14. A power supply switch circuit as defined in claim 12, wherein the logic means includes:

a logic gate performing an AND function and having a first input derived from the reset pulse such that the first input is in a low condition if the reset pulse has ended, a second input derived from the control signal such that the second input is in a "high" condition if the detected voltage across the first switch in the off state is below the threshold value, and an output that is in a "high" condition, used in switching the first switch on, only if both of the inputs indicate that the reset signal pulse is complete and that the voltage across the first switch in the open condition did not exceed the predetermined threshold.

15. A method used in testing a circuit module of an integrated circuit chip to determine if the module evidences a power-to-ground leak, and in isolating the module in the event that such a leak is detected, the method comprising:

(a) receiving a reset pulse of a predetermined voltage and duration;

(b) in response to the reset pulse, turning off a first switch connected in a power supply line to the module, and turning on a second switch connected in parallel to the first switch;

(c) detecting the voltage across the first switch in the off state;

(d) generating a control signal indicative of whether the voltage across the first switch in the off state is above a predetermined threshold value; and

(e) after the reset pulse, switching the first switch on again only if the control signal indicates that the voltage across the first switch in the off state was below the predetermined threshold, indicating no leakage conditions.

16. A power supply switch circuit used in detecting power-to-ground leaks in a portion of a semiconductor chip circuit, the power supply switch comprising:

(a) first and second power input lines used in supplying power to a portion of a semiconductor circuit;

(b) a reset line, used in receiving a reset signal pulse used to initiate detection of ground leakage currents from the circuit portion;

(c) first switch means, including a first switch connected in series with one of the first and second power input lines, the first switch means functioning to open the first switch in response to the presence of a reset signal pulse on the reset line;

(d) second switch means functioning in response to the presence of the reset pulse, to generate a control signal indicative of whether the voltage across the first switch in its open condition exceeds a predetermined threshold; and

(e) means connecting the control signal generated by the second switch means to the first switch means, which functions to leave the first switch open at the end of the reset pulse if the voltage across the first switch in its open condition exceeds the predetermined threshold;

and wherein the first switch means includes a NAND gate having two inputs, one input being an inverted signal from the reset pulse, the first input being "high" when the reset pulse is over, and the other input being derived from the control signal such that the second input is "high" when the voltage across the first switch in the off state is below the threshold value, the NAND gate providing an output signal to switch the first switch on only when both inputs are in the "high" condition.

17. A power supply switch circuit used in detecting power-to-ground leaks in a portion of a semiconductor chip circuit, the power supply switch comprising:

(a) first and second power input lines used in supplying power to a portion of a semiconductor circuit;

(b) a reset line, used in receiving a reset signal pulse used to initiate detection of ground leakage currents from the circuit portion;

(c) first switch means, including a first switch connected in series with one of the first and second power input lines, the first switch means functioning to open the first switch in response to the presence of a reset signal pulse on the reset line;

(d) second switch means functioning in response to the presence of the reset pulse, to generate a control signal indicative of whether the voltage across the first switch in its open condition exceeds a predetermined threshold; and

(e) means connecting the control signal generated by the second switch means to the first switch means, which functions to leave the first switch open at the end of the reset pulse if the voltage across the first switch in its open condition exceeds the predetermined threshold;

and wherein the second switch means includes delay means to ensure that the control signal is still available at the first switch means after termination of the reset signal pulse, and the delay means includes a first inverter ratioed to turn over at the predetermined voltage threshold, a second inverter to delay the control signal for a predetermined time, and a storage means for storing the state of the control signal.

18. The switch circuit of claim 17 in which the predetermined voltage threshold is about 1.5 volts.

19. The switch circuit of claim 17 in which the predetermined time is greater than about 6 nanoseconds.

20. The switch circuit of claim 17 in which the storage means includes a capacitive element having a capacitance of about 1 pF.