Matrix display devices with redundant driving transistor arrangement for improved fault tolerance

• US 4,851,827 A
• Filed: 05/26/1988
• Issued: 07/25/1989
• Est. Priority Date: 07/03/1987
• Status: Expired due to Fees

• Current Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Original Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Inventors: Nicholas, Keith H.
• Primary Examiner(s): Britton, Howard W.
• Assistant Examiner(s): Powell, Mark R.
• Application Number:
  US07/199,086
• Time in Patent Office: 425 Days
• Field of Search: 340/719, 340/784, 340/811, 358/236, 350/333, 350/332, 315/169.1
• US Class Current: 345/93
• CPC Class Codes: G02F 1/13624 having more than one switching element per pixel
• CPC Class Codes: G06F 11/0796 Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
• CPC Class Codes: G06F 11/1616 where the redundant component is an I/O device or an adapter therefor
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2330/08 Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

Abstract

In a matrix display device, such as an LCD-TV, supply of data signals to each one of an array of display elements is controlled by respective switching devices circuits in response to applied switching signals. Each switching device circuit is fault-tolerant and has two branches each containing two series-connected transistors, e.g. TFTs, and connected in parallel between a data signal input and a display element electrode with the transistor gates being connected to a common switching signal input. For commonly-occuring transistor defects such a circuit can tolerate a defective transistor, thereby improving fabrication yields. Further transistor defects are accommodated for improved fault tolerance by provision of impedances (38) in the gate supply lines. The impedance may be resistors or active loads (41).

Claims

1. A matrix display device comprising a plurality of display elements arranged in an array, each of which comprises electrodes carried on opposing substrates with electro-optical material therebetween and is associated with switching means operable to control the application of data signals to the display element in response to switching signals being applied thereto, characterised in that the switching means associated with each display element comprises a fault tolerant switching circuit having two branches connected electrically in parallel between a common data signal input and an electrode of the display element, with each branch comprising a plurality of transistors whose main current carrying electrodes are connected in series between the common data signal input and the picture element electrode and with the control electrodes of the transistors of both branches being connected to a common switching signal input.

2. A matrix display device according to claim 1, characterised in that each branch comprises two series-connected transistors.

3. A matrix display device according to claim 1, characterised in that the control electrodes of the transistors of both branches of the switching circuit are connected to the common switching signal input through respective impedances.

4. A matrix display device according to claim 3, characterised in that the value of the impedances is selected so as to be higher than the impedance exhibited by its associated transistor in the on state.

5. A matrix display device according to claim 4, characterised in that the value of the impedances associated with at least the two transistors next to the display element electrode is selected so as to prevent substantially the display element being discharged excessively in the period between successive addressing of the display element in the event of a control electrode/output electrode short in either of those transistors.

6. A matrix display device according to claim 3, characterised in that at least one of the impedances comprises a resistor.

7. A matrix display device according to claim 3, characterised in that at least one of the impedances comprises an active load.

8. A matrix display device according to claim 7, characterised in that the impedances associated with the transistors of the two branches next to the display element electrode comprise active loads.

9. A matrix display device according to claim 7, characterised in that the or each active load comprises a transistor.

10. A matrix display device according to claim 9, characterised in that the control electrode of the or each active load transistor is connected to the switching signal input via a resistance.

11. A matrix display device according to claim 1, characterised in that the transistors comprise thin film transistors formed on one of the substrates of the device.

12. A matrix display device according to claim 1, characterised in that the transistors comprise FETs formed on one of the substrates of the device, which substrate is of semiconductor material.

13. A matrix display device according to claim 1, characterised in that the electro-optical material comprises liquid crystal material.