Cache storage queue

• US 4,855,904 A
• Filed: 09/22/1988
• Issued: 08/08/1989
• Est. Priority Date: 08/27/1986
• Status: Expired due to Term

• Current Assignee: Amdahl Corporation (Fujitsu Limited)
• Original Assignee: Amdahl Corporation (Fujitsu Limited)
• Inventors: Petolino, Joseph A., Sobottka, Daniel C., Thomas, Jeffrey A., Finan, Christopher D., Daberkow, Kevin L.
• Primary Examiner(s): Eng, David Y.
• Application Number:
  US07/225,875
• Time in Patent Office: 320 Days
• Field of Search: 364/200 MS File, 364/900 MS File
• US Class Current: 712/218
• CPC Class Codes: G06F 12/0855 Overlapped cache accessing, e.g. pipeline G06F12/0846 takes precedence
• CPC Class Codes: G06F 9/3824 Operand accessing

Abstract

In a pipeline data processing machine having a first unit for execution of instructions running according to a first pipeline and a second unit for storing data from a plurality of ports running according to a second pipeline, the first unit having a result register for holding results including data and address information of a flow of the first pipeline, the present invention provides an apparatus for transferring results in the result register to the second unit. A plurality of registers connected to the result register, each storing the result from at least one flow of the first pipeline and storing control information is provided. Further, a controller in communication with the second unit and the plurality of ports responsive to the control information and a flow of the second pipeline is included for selecting one of the plurality of ports in a first-in, first-out queue as a port to the second unit and for updating the control information.

Claims

1. A data processing apparatus comprising:

instruction processing means for processing a sequence of instructions including

means, connected to receive the sequence of instructions, for decoding an instruction in the sequence to generate control signals including a request for storage of resulting data to a data location and an address identifying the data location, and other requests for access to a data location and corresponding addresses,

means, connected to receive a subset of the control signals, for executing decoded instructions to generate the resulting data; and

storage means for storing data at data locations identifiable by addresses;

storage port means, connected to receive resulting data from the executing means and having at least one register for holding the address and resulting data from the execution of an instruction when allocated to the instruction, for generating a request for access to a data location identified by the address in the at least one register to store the resulting data, the at least one register being free if it is not allocated; and

access control means, connected to receive a plurality of request for access to a data location including the requests for storage of resulting data and corresponding addresses from the storage port means and the decoding means, for processing a sequence of requests for access to the storage means including

means for allocating the at least one register in the storage port means if it is free in response to a request from the decoding means to store resulting data to the requesting instruction,

means for accessing data locations in response to other requests for access to a data location, and

means for selecting from the plurality of received requests one request for processing next in the sequence by the access control means in response to a priority signal.

2. The apparatus of claim 1, wherein the access control means includes a pipeline having a plurality of stages following the means for selecting in which a plurality of requests for access to a data location can be processed in different stages of the pipeline at a time.

3. The apparatus of claim 1, wherein the storage port means includes a plurality of registers for holding an address and resulting data from a plurality of requests for storage of resulting data from the decoding means.

4. The apparatus of claim 2, wherein the storage port means includes a plurality of registers for holding an address and resulting data from a plurality of requests for storage of resulting data from the decoding means.