Image display apparatus

• US 4,857,905 A
• Filed: 02/01/1988
• Issued: 08/15/1989
• Est. Priority Date: 02/05/1987
• Status: Expired due to Term

• Current Assignee: Namco Bandai Games Inc. (BANDAI NAMCO Holdings Inc.)
• Original Assignee: Namco Limited (BANDAI NAMCO Holdings Inc.)
• Inventors: Ogawa, Toru
• Primary Examiner(s): Brigance, Gerald
• Application Number:
  US07/150,908
• Time in Patent Office: 561 Days
• Field of Search: 340/703, 340/721, 340/748, 340/750, 340/799
• US Class Current: 345/551
• CPC Class Codes: G09G 5/026 Control of mixing and/or overlay of colours in general G09G5/022 and G09G5/024 take precedence
• CPC Class Codes: G09G 5/222 Control of the character-code memory

Abstract

An image display apparatus which synthesizes one color picture by placing a plurality of pictures with one on top of another. Only one shape generator and one character generator are provided for common use in synthesizing one color picture by placing the plurality of pictures with one on top of another. Each of the plurality of pictures is stored in a dedicated V-ram and is fed to the common shape generator and character generator via a priority decision circuit.

Claims

1. An image display apparatus which synthesizes one color picture by placing a plurality of pictures with one on top of another, said image display apparatus comprising:

a picture display memory for dividing each of said pictures before synthesis into a plurality of character blocks, and registering addresses for reading the color characters to be displayed in the respective character blocks at the respective character block addresses;

a raster display controller for successively outputting the character block address signals of the respective pictures before synthesis to said picture display memory in synchronization with horizontal and vertical scans of a raster display so that said picture display memory successively outputs the corresponding character read address signals in the numerical order of said pictures, and for successively outputting vertical scanning position address signals for the corresponding character blocks of the respective pictures;

a shape generator in which a plurality of character shapes to be displayed in the respective character blocks are registered in advance, and which outputs, in the numerical order of said pictures, character shape data for one horizontal scan of the character blocks which are designated by the corresponding vertical scanning position address signals in accordance with the character shapes designated by the corresponding character read address signals which are successively input in the numerical order of said pictures before synthesis;

a priority decision circuit for comparing said character shape data for one horizontal scan which are output from said shape generator in the numerical order of said pictures with each other in accordance with predetermined priorities and determining the priority picture for each dot which is to be displayed at the time of a horizontal scan of said raster display; and

a character generator in which a plurality of color character data to be displayed in the respective character blocks are registered in advance, and which successively outputs color data for one dot which are specified by the corresponding vertical scanning position address signal and a horizontal scanning position address signal in accordance with said color character data designated by said character read address of said priority picture in synchronization with a scan of said raster display;

said shape generator and said character generator being provided for common use in synthesizing one color picture by placing said plurality of pictures with one on top of another.

2. An image display apparatus according to claim 1, wherein said picture display memory sets each character block of each of said pictures at 8 dots in the horizontal direction and 8 dots in the vertical direction.

3. An image display apparatus according to claim 1, wherein a plurality of said picture display memories and said raster display controllers are provided in correspondence with the number of said pictures used for synthesis.

4. An image display apparatus according to claim 3, wherein at least one of said picture display memories is used for a scroll reference picture which is larger than a picture for a raster display.

5. An image display apparatus according to claim 1, further comprising a picture computing circuit for designating the region of said scroll reference picture which is to be displayed on said raster display, and for outputting the designation signal to the display controller which corresponds to the picture to be displayed;

and

said picture display memory includes at least one picture display memory used for a scroll reference picture which is larger than a picture for raster display.

6. An image display apparatus according to claim 1, wherein said shape generator uses the technique of time sharing so as to output said character shape data for one horizontal scan in the corresponding character blocks in the respective pictures in the numerical order of said pictures.

7. An image display apparatus according to claim 1, wherein said picture display memory and said display controller use the technique of time sharing so as to compute and output said character read address signals and said vertical scanning position address signals of the respective pictures in the numerical order of said pictures.

8. An image display apparatus according to claim 5, wherein said display controller includes

a block address generation circuit for outputting a block address of said scroll reference picture,

said block address generation circuit including

a horizontal block computing circuit for outputting a signal indicating the horizontal block position of said scroll reference picture, and

a vertical position computing circuit for outputting the vertical position of said scroll reference picture.

9. An image display apparatus according to claim 1, wherein said picture display memory includes

an RAM in which scroll reference pictures are registered and

an RAM in which fixed pictures are registered;

and

said display controller includes

a first block address generation circuit for successively outputting block addresses of the respective scroll reference pictures,

a second block address generation circuit for successively outputting block addresses of the respective fixed pictures,

a multiplexer for switching and outputting the signals output from said first and second block address generation circuits in the numerical order of said pictures,

a picture number generator for generating the number of the picture corresponding to the signal which is output through said multiplexer, and

an address computing circuit for computing and outputting said character block address signals and said vertical scanning position address signals of the respective pictures on the basis of the signals output from said multiplexer and said picture number generator,

whereby the computed character block address signal is output to the corresponding RAM of said picture display memory, and the computed vertical scanning position address signal is output to said priority decision circuit.

10. An image display apparatus according to claim 9, wherein said first block address generation circuit includes

a horizontal block computing circuit for outputting a signal indicating the horizontal block position of said scroll reference picture, and

a vertical position computing circuit for outputting the vertical position of said scroll reference picture.

11. An image display apparatus according to claim 10, wherein said horizontal block computing circuit includes

a plurality of block displacement latch circuits which are provided in correspondence with said scroll reference pictures and in which displacements relative to the horizontal direction of the corresponding pictures to be displayed are set in blocks,

a multiplexer for selectively switching and outputting the outputs of said latch circuits at a predetermined timing,

an H counter for increasing the count value by one at the end of every horizontal scan of one block of said raster display, and

an adder for adding the output of said H counter and the output of said multiplexer and outputting a signal indicating the block position in the horizontal direction of said scroll reference picture;

and

said vertical position computing circuit includes

a plurality of latch circuits in which the displacements relative to the vertical direction of the corresponding scroll reference picture are set in dots,

a multiplexer for selectively outputting the outputs of said latch circuits at a predetermined timing,

a V counter for increasing the count value by one at the end of every horizontal scan of the picture to be displayed in said raster display, and

an adder for adding the output of said V counter and the output of said multiplexer and outputting a signal indicating the vertical position in said scroll reference picture.

12. An image display apparatus according to claim 1, wherein said priority decision circuit includes

a plurality of picture data storage circuits in which are input said address read signals and said vertical scanning position address signals of the respective pictures and said character shape data for one horizontal scan which are output from said shape generator on the respective pictures,

a latch circuit in which the priorities of the respective pictures are registered,

a priority circuit for comparing the character shape data for one horizontal scan of the corresponding picture with another character shape data in each dot on the basis of the priorities of the respective pictures which are set and registered in said latch circuit so as to determine the picture having the highest priority for each dot, and outputting a selection signal commanding the selection of the picture data storage circuit which corresponds to said picture having the highest priority, and

a multiplexer for selecting the signal output from said picture data storage circuit which is designated by said selection signal input at every scan of one dot of said raster display and outputting the selected signal to said character generator.

13. An image display apparatus according to claim 1, wherein said priority decision circuit includes

a plurality of picture data storage circuits in which are input said address read signals and said vertical scanning position address signals of the respective pictures and said character shape data for one horizontal scan which are output from said shape generator on the respective pictures,

a priority circuit in which the priorities of the respective pictures are registered and which compares the character shape data for one horizontal scan of the corresponding picture with another character shape data in each dot on the basis of the registered priorities of the respective pictures so as to determine the picture having the highest priority for each dot, and outputs a selection signal commanding the selection of the picture data storage circuit which corresponds to said picture having the highest priority, and

a multiplexer for selecting the signal output from said picture data storage circuit which is designated by said selection signal input at every scan of one dot of said raster display and outputting the selected signal to said character generator.