Power supply arrangement

• US 4,858,196 A
• Filed: 02/25/1988
• Issued: 08/15/1989
• Est. Priority Date: 07/17/1987
• Status: Expired due to Fees

• Current Assignee: Siemens AG
• Original Assignee: Siemens AG
• Inventors: Hein, Gerd
• Primary Examiner(s): Popek, Joseph A.
• Application Number:
  US07/160,441
• Time in Patent Office: 537 Days
• Field of Search: 365/226, 365/227, 365/228, 365/229, 371/66, 307/66
• US Class Current: 365/229
• CPC Class Codes: H02J 9/061 for DC powered loads

Abstract

A power supply arrangement (2) with a first controlled power output (12) and a second controlled output (26) also has a controlled backup output (16) which is connected by means of a buffered bus with several read/write memories (8) of a computer (4). The read/write memories (8) of the computer (4) can be switched over to a stand-by mode in case of a power failure and connected with a backup battery (20). In accordance with the invention, the read/write memories (8) are switched during normal network operation to an active operating mode connected by means of a low-impedance switch (34) with the controlled power output (12). The low-impedance switch (34) is controlled by means of a switching signal (U_S1). The backup battery (20) is connected with the controlled backup output (16) via a second switch (46) and a series controller (48).

Claims

1. A power supply arrangement of the type having a controlled operating power output and a controlled buffer output, the buffer output being connected to a plurality of read-write memories of a computer, the read-write memories being switched to a stand-by mode and connected to a back-up power source upon a failure of the line voltage, the improvement therein comprising:

low impedance first switch means responsive to a first switch control signal for connecting the read-write memories for active operation to the power output during normal line conditions, and

second switch means responsive to a second switch control signal for connecting the back-up power source via a first series controller to the buffer output.

2. The power supply arrangement as defined in claim 1, comprising:

means including a load circuit comprising in a series connection a second series controller and relay for connecting the back-up power source to the buffer output, the common node of the second series controller and the relay being connected to an input of the second switch.

3. The power supply arrangement as defined in claim 1, comprising:

means for preventing the second switch from opening before a first predetermined time period after the low impedance first switch is closed.

4. The power supply arrangement as defined in claim 3, comprising:

means for preventing the low-impedance switch from opening before a second predetermined time period after the second switch is closed.