Regulated ultrasonic generator

• US 4,864,547 A
• Filed: 05/20/1986
• Issued: 09/05/1989
• Est. Priority Date: 05/20/1986
• Status: Expired due to Fees

• Current Assignee: Crestek, Inc. (The Crest Group Inc.)
• Original Assignee: Crestek, Inc. (The Crest Group Inc.)
• Inventors: Krsna, Steve
• Primary Examiner(s): Taroza, Thomas H.
• Assistant Examiner(s): Swann, Tod
• Application Number:
  US06/865,255
• Time in Patent Office: 1,204 Days
• Field of Search: 367/137, 367/138, 310/317, 310/316, 310/118, 73/642, 73/596, 73/602, 363/55, 363/56, 363/58, 363/93, 363/132, 318/118
• US Class Current: 367/137
• CPC Class Codes: B06B 1/0223 for generating signals continuous in time

Abstract

A regulated ultrasonic generator operable for supplying a driving signal to an ultrasonic transducer is disclosed. The generator includes: a power supply; a bridge inverter circuit for generating a power signal having two alternating components of opposite potential; a timing circuit for generating a timing signal equal in frequency to the desired frequency of the power signal; a bridge driver circuit for periodically generating base drive signals for switching on the bridge inverter circuit; a bridge modulating circuit for controlling the amount of time during each cycle that the bridge inverter circuit is on so as to regulate the power content of the power signal; and means for supplying the power signal to the ultrasonic transducer.

Claims

1. An apparatus for generating a driving signal for powering an ultrasonic transducer, said apparatus comprising:

a power supply;

bridge inverter means powered by said power supply for generating a power signal having two alternating components of opposite potential, wherein said bridge inverter means includes four power transistors configured in two pairs thereof, wherein each pair of power transistors generates one component of said power signal;

timing means for generating a timing signal equal in frequency to the desired frequency of said power signal;

bridge driving means responsive to said timing signal for periodically generating base drive signals that when supplied to the bases of said power transistors cause said power transistors to switch on, wherein said bridge driving means alternately generates said base drive signals at the desired frequency for switching on alternate pairs of said power transistors;

bridge modulating means coupled between said bridge driving means and said bridge inverter means for selectively connecting said base drive signals to and disconnecting said base drive signals form the bases of said power transistors, said bridge modulating means including four modulating transistors each coupled between said bridge driving means and a base terminal of one of said power transistors and operable for supplying a base drive signal to its coupled power transistor, said bridge modulating means including means responsive to the power of said power signal for regulating the amount of time during each cycle of said power signal that said power transistors are on by switching on and off said modulating transistors; and

means for supplying said power signal to the ultrasonic transducer.

2. An apparatus as recited in claim 1 wherein said timing means includes a first timer running at a frequency equal to twice the desired frequency, and includes a D-type flip-flop that receives the output signal of said first timer as a clock input signal thereto, and wherein said flip-flop generates said timing signal at the desired frequency and also generates an inverse timing signal equal to the logical inverse of said timing signal.

3. An apparatus as recited in claim 2 wherein said first timer includes means for adjusting the frequency of operation of said first timer so as to adjust the frequency of said timing signal.

4. An apparatus as recited in claim 1 wherein said bridge driving means includes a capacitor, a bridge driving transformer, and first and second bridge driving transistors, wherein said capacitor is continuously charged by said power supply, wherein said first and second bridge driving transistors and circuitry associated therewith in response to said timing signal alternately connect a first terminal of the primary windings of said bridge driving transformer to opposite terminals of said capacitor, wherein said bridge driving means further includes means for coupling a second terminal of said primary windings of said bridge driving transformer to a potential intermediate to the potentials alternately applied to said first terminal of said primary windings through said bridge driving transistors, and wherein said base drive signals are generated by secondary windings of said bridge driving transformer.

5. An apparatus as recited in claim 4 wherein said bridge driving transformer includes four secondary windings, each generating a base drive signal for connection to an individual power transistor of said bridge inverter means.

6. An apparatus as recited in claim 5 wherein all of said power transistors are bipolar transistors of like polarity, wherein the two base drive signals generated to drive one pair of power transistors are the opposite polarity as the other two base drive signals generated to drive the other pair of power transistors, and wherein the polarities of said base drive signals alternate according to the frequency of said timing signal.

7. An apparatus as recited in claim 4 wherein said bridge driving transistors are coupled in a complementary manner such that each bridge driving transistor is switched off when the other bridge driving transistor is switched on.

8. An apparatus as recited in claim 7 wherein said timing signal is coupled to the base of one of said bridge driving transistors for switching said bridge driving transistors o and off.

9. An apparatus as recited in claim 1 wherein said bridge modulating means includes four modulating transistors each connected in series between the base of a corresponding one of said power transistors and said bridge driving means, wherein each of said modulating transistors is operable for selectively connecting a corresponding base drive signal to and disconnecting the base drive signal from the base of said corresponding power transistor, and wherein said bridge modulating means also includes modulating transistor switching means for switching said modulating transistors on and off.

10. An apparatus as recited in claim 9 wherein said four modulating transistors are grouped into two pairs thereof, with each pair of modulating transistors being coupled to a corresponding one of said pairs of power transistors.

11. An apparatus as recited in claim 10 wherein said bridge modulating means further includes coupling means for coupling together the control terminals of each pair of modulating transistors, and wherein a controlled transistor of each pair of modulating transistors is directly switched by said modulating transistor switching means and a follower transistor of said pair of modulating transistors is indirectly switched through said coupling means.

12. An apparatus as recited in claim 11 wherein said coupling means includes two coupling transformers with each of said coupling transformers coupling together the control terminals of a pair of modulating transistors so that a control signal applied to the control terminal of a controlled transistor is coupled through said coupling transformer and also applied to the control terminal of the associated follower transistor to switch on or off both transistors of said pair of modulating transistors.

13. An apparatus as recited in claim 10 wherein said modulating transistor switching means includes logic means for combining said timing signal with a modulator signal to generate modulating transistor control signals that control the switching of said modulating transistors, wherein said modulator signal defines the amount of time during each cycle of said power signal that said power transistors are to be switched on in order to obtain a desired output power from said power signal.

14. An apparatus as recited in claim 13 wherein each of said modulating transistor control signals controls the switching of one of said pairs of modulating transistors, and wherein said logic means includes two channels of logic circuitry each channel operable for logically combining said timing signal with said modulator signal to generate one of said modulating transistor control signals.

15. An apparatus as recited in claim 14 wherein one of said channels of logic circuitry includes a first AND gate that logically combines said timing signal and said modulator signal to generate a first modulating transistor control signal, and wherein the other one of said channels of logic circuitry includes a second AND gate that logically combines said modulator signal with the inverse of said timing signal to generate a second modulating transistor control signal.

16. An apparatus as recited in claim 13 wherein said bridge modulating means further includes current sensing means for sensing the current of said power signal, includes current reference means for indicating a desired current of said power signal, includes comparison means for generating a current error signal indicative of the relative difference between the sensed current of said power signal and the desired current thereof, and includes pulse width modulation means responsive to said current error signal for generating said modulator signal.

17. An apparatus as recited in claim 16 wherein said current sensing means includes a current sensing resistor through which said power signal flows, wherein the voltage drop across said current sensing resistor indicates the current of said power signal.

18. An apparatus as recited in claim 17 wherein said current reference means includes a voltage divider coupled between one side of said current sensing resistor and a reference voltage, wherein said comparison means includes a voltage comparator coupled at a first input terminal thereof to an intermediate voltage tap on said voltage divider and coupled at a second input terminal thereof to the other side of said current sensing resistor, and wherein said voltage comparator generates said current error signal according to the voltage difference between the signals applied to the input terminals of said voltage comparator.

19. An apparatus as recited in claim 18 wherein the voltage difference between the signals applied to the input terminals of said voltage comparator is zero when the desired current is flowing across said current sensing resistor.

20. An apparatus as recited in claim 16 wherein said pulse width modulation means includes a second timer triggered at a rate determined by said timing signal, wherein a modulation input terminal of said second timer receives said current error signal and an output terminal of said second timer generates said modulator signal, wherein the pulse width of said modulator signal is determined by the magnitude of said current error signal.

21. An apparatus as recited in claim 16 further comprising soft-start means for gradually increasing the pulse width of said modulator signal during an initial power-up of said apparatus.

22. An apparatus as recited in claim 21 wherein said soft-start means includes a soft-start capacitor that is initially discharged and which gradually charges during the initial power-up of said apparatus, and wherein the voltage of said current error signal supplied to said pulse width modulation means is limited by the charge on said soft-start capacitor during the initial power-up of said apparatus.

23. An apparatus as recited in claim 21 wherein said logic means is responsive to a cut-off signal for generating said modulating transistor control signals for switching off said modulating transistors, and wherein said soft-start means includes means for generating said cut-off signal at the beginning of the initial power-up of said apparatus.

24. An apparatus as recited in claim 13 wherein said logic means is responsive to a cut-off signal for generating said modulating transistor control signals for switching off said modulating transistors, and wherein said apparatus further comprises a duty cycle controller for periodically generating said cut-off signal to control the duty cycle of said apparatus.

25. An apparatus as recited in claim 24 wherein said power supply supplies cyclic power to said bridge inverter means at a frequency less than the desired frequency of said power signal, and wherein said duty cycle controller includes a duty cycle timer that begins timing at the start of each power supply cycle and generates said cut-off signal after a selectable time after the start of the power supply cycle but before the end of the power supply cycle.

26. An apparatus as recited in claim 1 wherein said means for supplying said power signal to the ultrasonic transducer includes an output power transformer coupled to said bridge inverter means for converting said power signal into the driving signal for transmission to the ultrasonic transducer.

27. An apparatus as recited in claim 26 wherein said output power transformer has some inductance that acts to round off the sharp corners of said power signal so that the waveshape of the driving signal is similar to a sine wave.

28. An apparatus for generating a driving signal for powering an ultrasonic transducer, said apparatus comprising:

a power supply;

bridge inverter means powered by said power supply for generating a power signal having two alternating components of opposite potential, wherein said bridge inverter means includes four power transistors configured in two pairs thereof, wherein each pair of power transistors generates one component of said power signal;

timing means for generating a timing signal equal in frequency to the desired frequency of said power signal;

bridge driving means responsive to said timing signal for periodically generating base drive signals that when supplied to the bases of said power transistors cause said power transistors to switch on, wherein said bridge driving means alternately generates said base drive signals at the desired frequency for switching on alternate pairs of said power transistors, wherein said bridge driving means includes a bridge driving transformer and means for supplying an alternating current to said bridge driving transformer, wherein said alternating current is equal in frequency to said timing signal, and wherein said base drive signals are generated by secondary windings of said bridge driving transformer;

bridge modulating means coupled between said bridge driving means and said bridge inverter means for selectively connecting said base drive signals to and disconnecting said base drive signals from the bases of said power transistors, wherein said bridge modulating means includes four modulating transistors and means for switching said modulating transistors on and off, wherein each of said modulating transistors is connected in series between the base of a corresponding one of said power transistors and one of said secondary windings of said bridge driving transformer, wherein said means for switching said modulating transistors includes logic means for combining said timing signal with a modulator signal to control the switching of said modulating transistors, wherein said modulator signal defines the amount of time during each cycle of said power signal that said power transistors are to be switched on in order to obtain a desired current of said power signal, wherein said bridge modulating means further includes means for generating said modulator signal including current sensing means for sensing the current of said power signal, comparison means for generating a current error signal indicative of the relative difference between the sensed current of said power signal and the desired current thereof, and pulse width modulation means responsive to said current error signal for generating said modulator signal; and

an output power transformer coupled to said bridge inverter means for converting said power signal into the driving signal for transmission to the ultrasonic transducer.