Method of forming a low loss FET
First Claim
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1. A method of forming a self-aligned, low loss field effect transistor (FET), comprising:
- establishing a doped semiconductive substrate of a first polarity with a doped semiconductive body region of opposite polarity set in the substrate and characterized by a raised area and a lateral recessed area, a layer of gate insulative material over the raised area and extending above the recessed area, a gate member on the opposite side of the gate insulative layer from the body region, and a layer of doped semiconductive material of the same relative polarity as the substrate, the doped layer being spaced from the gate member by a lateral portion of the gate insulative layer and extending over the recessed area and under the gate insulative layer to the raised area,substantially removing the doped layer lateral to the gate insulative layer,coating the substrate with a refractory metal,treating the refractory metal coating so that an adherent conductive layer is formed with the underlying gate member, doped layer and recessed area, but not with the underlying gate insulative layer,removing the refractory metal coating from the gate insulative layer, the conductive layer overlying the recessed area providing a direct metal contact with the body region and doped layer, the conductive layer overlying the gate member providing a direct metal contact with the gate member, the lateral portion of the gate insulative layer electrically insulating the doped layer from the gate member, andconnecting a gate connection to the conductive layer overlying the gate member, a source connection to the conductive layer overlying the recessed area, and a drain connection at a drain location.
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Abstract
An improved FET is described in which a conductive layer connects the source structure to a truncated source extension which underlies an insulative gate layer and connects to a channel region. The conductive layer is of substantially lower resistivity than the source extension, thereby significantly reducing the lateral resistance of the device to diminish losses and reduce the likelihood of a parasitic bipolar transistor turning on. The invention can be implemented in both vertical and lateral devices. For a lateral device the drain is connected by a low resistance conductive layer to the gate region in a manner similar to the source.
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7 Claims
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1. A method of forming a self-aligned, low loss field effect transistor (FET), comprising:
establishing a doped semiconductive substrate of a first polarity with a doped semiconductive body region of opposite polarity set in the substrate and characterized by a raised area and a lateral recessed area, a layer of gate insulative material over the raised area and extending above the recessed area, a gate member on the opposite side of the gate insulative layer from the body region, and a layer of doped semiconductive material of the same relative polarity as the substrate, the doped layer being spaced from the gate member by a lateral portion of the gate insulative layer and extending over the recessed area and under the gate insulative layer to the raised area, substantially removing the doped layer lateral to the gate insulative layer, coating the substrate with a refractory metal, treating the refractory metal coating so that an adherent conductive layer is formed with the underlying gate member, doped layer and recessed area, but not with the underlying gate insulative layer, removing the refractory metal coating from the gate insulative layer, the conductive layer overlying the recessed area providing a direct metal contact with the body region and doped layer, the conductive layer overlying the gate member providing a direct metal contact with the gate member, the lateral portion of the gate insulative layer electrically insulating the doped layer from the gate member, and connecting a gate connection to the conductive layer overlying the gate member, a source connection to the conductive layer overlying the recessed area, and a drain connection at a drain location. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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