Microcomputer system for regulating internal combustion vehicular engines

• US 4,884,204 A
• Filed: 08/06/1986
• Issued: 11/28/1989
• Est. Priority Date: 05/09/1985
• Status: Expired due to Fees

• Current Assignee: Voest-Alpine-Friedmann GmbH
• Original Assignee: Voestalpine Automotive GmbH (Voestalpine AG)
• Inventors: Seibt, Artur, Kainz, Alois
• Primary Examiner(s): Gruber, Felix D.
• Assistant Examiner(s): Ramirez, Ellis B.
• Application Number:
  US06/893,656
• Time in Patent Office: 1,210 Days
• Field of Search: 364/131, 364/132, 364/133, 364/134, 364/431.11, 364/431.03, 364/431.12, 364/200, 364/900, 371/9
• US Class Current: 701/101
• CPC Class Codes: F02B 1/04 with fuel-air mixture admission into cylinder
• CPC Class Codes: F02D 41/2406 using essentially read only memories
• CPC Class Codes: F02D 41/266 the computer being backed-up or assisted by another circuit, e.g. analogue
• CPC Class Codes: G06F 15/17 using an input/output type connection, e.g. channel, I/O port

Abstract

This microcomputer system can be used, for example, in a regulator for internal combustion engines for controlling and regulating the fuel injection and other functions in a motor vehicle in dependence on operating magnitudes. Exemplary controlled functions include engine revolutions, charging pressure, gas pedal position, etc. The controlled functions are determined with the aid of sensors connected with the microcomputer system. The outputs of the microcomputer are connected with servo members, signal displays or the like, which may be energized by drive circuits. The system functions are distributed over the individual microcomputers (1, 2, 3), and a parameter storer (5) is provided for, for example, motor-specific and vehicle-specific data.

The system includes individual microcomputers (1, 2, 3) and a parameter storer (5), preferably constructed as a pluggable module, which are connected to a combined, bidirectional address and data bus (4) isolated from the microcomputer-internal address and data buses, and is designed exclusively for the exchange of data among the digital components of the system. The system is extremely resistant to electromagnetic interference making it particularly suitable for motor vehicles.

Claims

1. A microcomputer system for parallel processing of data and instructions, for regulating an internal combustion vehicular engine and for indicating engine status comprising:

a plurality of microcomputer modules including a first module with a microcomputer therein having internal buses for performing first priority assignments and at least a second microcomputer module with a microcomputer therein having internal buses for performing second priority assignments;

a pluggable parameter storer module having a storer/memory therein which is programmable in accordance with the specific requirements of the vehicle, the engine, the assignments of each of the microcomputers, and the priority of same; and

a combined bidirectional address and data bus for interconnecting said microcomputers for data transfer among said microcomputers while maintaining isolation of said combined bidirectional address and data bus from the internal buses of said microcomputers to provide substantial immunity from noise interference and further for interconnecting each of said microcomputer modules and said parameter storer module in a manner whereby said first microcomputer has first priority of access to said storer/memory for performing first priority assignments; and

storer module being pluggable into said bidirectional address and data bus whereby the system easily can be modified for another engine or vehicle.

2. Microcomputer system according to claim 1 wherein each microcomputer has restart output means, which are connected with unmaskable interrupt inputs of the other microcomputers.

3. The microcomputer system according to claim 1 further including a control line between the first microcomputer and the parameter storer for some of the address bits.

4. Microcomputer system according to claim 3 wherein each microcomputer has restart output means, which are connected with unmaskable interrupt inputs of the other microcomputers.

5. The microcomputer system according to claim 1, further including a flank-triggered address storer between the parameter storer and the combined address and data bus.

6. Microcomputer system according to claim 5 wherein each microcomputer has restart output means, which are connected with unmaskable interrupt inputs of the other microcomputers.

7. The microcomputer system according to claim 5 further including a control line between the first microcomputer and the parameter storer for some of the address bits.

8. Microcomputer system according to claim 7 wherein each microcomputer has restart output means, which are connected with unmaskable interrupt inputs of the other microcomputers.

9. Microcomputer system of claim 1 wherein each of said microcomputers is a one chip microcomputer.