I/O Execution method for a virtual machine system and system therefor

• US 4,885,681 A
• Filed: 01/16/1985
• Issued: 12/05/1989
• Est. Priority Date: 01/18/1984
• Status: Expired due to Term

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Sato, Hiroaki, Sawamoto, Hideo, Umeno, Hidenori, Hagiwara, Nobutaka, Kubo, Takashige
• Primary Examiner(s): Shaw, Gareth D.
• Assistant Examiner(s): Rudolph, Rebecca L.
• Application Number:
  US06/691,909
• Time in Patent Office: 1,784 Days
• Field of Search: 364/200 MS File, 364/900 MS File
• US Class Current: 718/1
• CPC Class Codes: G06F 13/10 Program control for peripheral devices G06F13/14 - G06F13/42 take precedence
• CPC Class Codes: G06F 2009/45579 I/O management, e.g. providing access to device drivers or storage
• CPC Class Codes: G06F 9/45558 Hypervisor-specific management and integration aspects

Abstract

In a virtual machine system (VMS) capable of concurrently running at least one operating system (OS) under one real computer system and a control program (VMCP) for controlling the VMS, the object is to reduce the overhead produced for simulating VM I/Os by direct I/O execution. A VM information area of a real sub-channel control block has a status field in which a flag indicating that the sub-channel is dedicated or not is contained. When the flag is "0", it means that the sub-channel is dedicated to the VM and the sub-channel scheduling by the VMCP is not necessary. As a real interruption priority order is dedicated to a VM, only I/O interruption requests of the VM are queued into the real interruption request queue of that dedicated priority order, and the mixing of VMs in that real interruption priority order is avoided. When an interruption control mask of an interruption priority order of the OS on the VM is "0" indicating that the interruption is not acceptable by the VM, the interruption control mask of the corresponding dedicated real interruption priority order is also "0" and the hardware interruption does not take place. Accordingly, the interruption is retained by the hardware and the I/O interruption retention for the VM by the VMCP is avoided.

Claims

1. In a computer system for realizing virtual machine system by concurrently running a plurality of operating systems under control of a virtual machine control program, wherein the computer system includes (1) a plurality of I/O devices each being either dedicated to one fo the operating systems or shared by plural ones of the operating systems, (2) I/O instruction execution means for controlling start of an I/O operation of one of the I/O devices designated by a start I/O instruction issued by a running operating system and (3) an I/O processor for controlling execution of the I/O operation of the one I/O device, an I/O execution method for the virtual machine system comprising the steps of:

storing a flag for a respective I/O device indicative of whether the respective I/O device is dedicated to one of the virtual machines to be run on the computer system and storing a VM identifier for a respective I/O device which is dedicated to a respective one of the virtual machines and indicative of the one virtual machine, wherein the storing of the flag and the VM identifier is carried out under control of the virtual machine control program;

storing, as address translation information to be used by said I/O processor for a respective I/O device which is dedicated to a respective virtual machine, address translation information predetermined for the virtual machine so as to translate addresses of a main memory of the virtual machine into addresses of a main memory of the computer system, which addresses of the main memory of the virtual machine are required for execution of instructions by the virtual machine, wherein the selection is carried out under control of the virtual machine control program;

accessing, in response to a start I/O instruction issued from an operating system running one of the virtual machines, a flag and a VM identifier already stored for an I/O device designated by the start I/O instruction, wherein the accessing is carried out by means of said I/O instruction execution means, which responds to the start I/o instruction without intervention of the virtual machine control program to determine whether the designated I/O device designated is dedicated to the running operating system, depending on a value of the accessed flag and VM identifier, wherein the determination is carried out by means of the I/O instruction execution means in response to the start I/O instruction;

producing an order for ordering said I/O processor to execute an I/O operation designated by the start I/O instruction when the I/O device had been determined as being dedicated to the running operating system, wherein the producing is carried out by means of said I/O instruction execution means in response to the start I/O instruction, without intervention of the virtual machine control program;

accessing address transformation information stored for the designated I/O device;

translating addresses of channel commands, indicated by the start I/O instruction and data addresses included in the channel commands using the accessed address translation information, into addresses of the main memory of the computer system; and

executing the I/O instruction, by controlling execution of an I/O operation designated by the start I/O instruction by the designated I/O device, wherein the accessing, translation and executing is carried out by said I/O processor in response to the produced order, without intervention of the virtual machine control program.

2. A method according to claim 1, further comprising the steps of:

setting an I/O direct execution mode flag to a first or second state under control of the control program when the control program runs a virtual machine;

detecting a value of the flag in response to the issue of the start I/O instruction, wherein the detection is done by means of said I/O instruction execution means;

starting the accessing when the value of the flag is detected as the first state;

interrupting, by means of said I/O instruction execution means, said running operating system program, when the value of the flag is detected as the second state, so as to order the running operating system to inform the control program of the issuance of a start I/O instruction so that the control program controls execution of the start I/O instruction.

3. A method according to claim 1 wherein the computer system further includes interruption control means connected to the plurality of I/O devices for controlling acceptance of an I/O interruption generated by one of the I/O devices, wherein respective real interruption priorities assigned to respective I/O devices are either dedicated to one of the operating systems or shared by plural ones of the operating systems, the method further comprising the steps of:

determining, by means of said interruption control means, whether an I/O interruption generated by one of the I/O devices can be accepted, depending on whether or not the interruption satisfies a first condition that a real interruption priority assigned to the one I/O device is dedicated to the running operating system, a second condition that an I/O mask included in a program status word for the running operating system has a value to allow acceptance of an interruption of some interruption priority, and a third condition that the real interruption priority is an interruption priority for which the running operating system allows acceptance of an interruption; and

indicating, by means of said interruption control means, the interruption to the running operating system when it is determined that the I/O interruption is to be accepted.

4. A method according to claim 3, wherein the computer system further includes an I/O direct execution mode flag for designating an I/O operation mode, further comprising the steps of:

detecting, by means of said interruption control means and in response to the I/O interrupt, a state of the flag, so as to execute said determination and indication steps when said flag is in a first state; and

interrupting, by means of said interruption control means, the running operating system so as to inform the control program of occurrence of the interruption by said one I/O device when said flag is in a second state.

5. A method according to claim 3, further comprising the steps of:

translating, by means of the I/O instruction execution means, a virtual interruption priority designated by an I/O instruction issued by the running operating system before issue of the start I/O instruction to a real interruption priority order by said priority so as to indicate the real interruption priority to the I/O processor the virtual interruption priority indicating an interruption priority of an I/O interruption to be generated by a virtual I/O device designated by the start I/O instruction, and the real interrruption priority being a real interrutpion priority assigned to a real I/O device corresponding to the virtual I/O device; and

indicating, by means of said I/O processor and in response to generation of an I/O interruption by the real I/O device corresponding to the virtual I/O device, the real interruption priority to the interruption execution means.

6. A method according to claim 3, further comprising the steps of:

translating, by means of said I/O instruction execution means, a virtual I/O device address designated by the start I/O instruction and indicative of a virtual I/O device to which the I/O operation is to be done, to a real I/O device address indicative of one of the real I/O devices to which the I/O operation relates, so as to indicate the one real I/O device address to the I/O processor at the time of ordering of the execution of the I/O operation;

translating, by means of said interrupt control means and in response to generation of an I/O interruption by the one real I/O device, a real I/O device address of the one real I/O device to the virtual I/O device addrress so as to indicate the virtual device address to the running operating system.

7. A method according to claim 1, further comprising a step of:

translating, by means of said I/O instruction execution means, a virtual I/O device address designated by the start I/O instruction and indicative of a virtual I/O device to which the I/O operation relates, to a real I/O device address indicative of one of the real I/O devices to which the I/O operation relates, so as to indicate the one real I/O device address to the I/O processor at the time of ordering of the execution of the I/O operation.

8. A method according to claim 1, further comprising a step of interrupting, by means of said I/O instruction execution means, the running operating system so as to inform the control program of the issuance of a start I/O instruction by the running operation system when the I/O device has been determined to be not dedicated to the running operating system.

9. A computer system realizing a virtual machine system by concurrently running a plurality of operating systems under control of a virtual machine control program, comprising:

a plurality of I/O devices each being either dedicated to one of the operating systems or shared by plural ones of the operating systems, I/O instruction execution means for controlling start of an I/O operation of one of the I/O devices designated by a start I/O instruction issued by a running operating system and an I/O processor for controlling execution of the I/O operation of the one I/O device;

wherein the I/O instruction execution means includes means for determining whether an I/O device designated by a start I/O instruction is dedicated to a running operating system when the running operating system issues the instruction;

wherein said I/O instruction execution means includes means for ordering said I/O processor to execute an I/O operation designated by the start I/O instruction when the I/O device has been determined as being dedicated to the running operating system;

wherein said I/O processor includes means responsive to an order for translating a memory address indicated by said start I/O instruction to a real main memory address of the computer system and means for controlling execution of the designated I/O operation by the designated I/O device, based upon the real main memory address.

10. A computer system according to claim 9 wherein the computer system further includes:

interruption control means connected to the plurality of I/O devices for controlling acceptance of an I/O interruption generated by one of the I/O devices, wherein respective real interruption priorities assigned to respective I/O devices are either dedicated to one of the operating systems or shared by plural ones of the operating systems;

wherein said interruption control means includes means for determining whether an I/O interruption generated by one of the I/O devices can be accepted, depending upon whether or not the interruption satisfies a condition that a real interruption priority assigned to the one I/O device is dedicated to the running operating system, a condition that the running operating system in in a state to allow acceptance of an interruption of some interruption priority, and a condition that the real interruption priority is an interruption priority for which the running operating system allows acceptance of an interruption; and

wherein said interruption control means includes means for indicating the interruption to the running operating system when it is determined that the interruption is to be accepted.

11. An interruption circuit for use in a computer system realizing a virtual machine system by concurrently running a plurality of operating systems under control of a virtual machine control program, wherein the computer system includes a plurality of I/O devices which are respectively assigned with a respective one of a plurality of real I/O interruption priorities which are each either dedicated to one of the plural operating systems or shared by plural ones thereof, the interruption circuit comprising:

a dedication status register for holding dedication status signals for respective real interruption priorities respectively representing whether or not respective real interruption priorities are dedicated to an operating system running on the computer system;

an interruption pending register for holding interruption status signals for respective real interruption priorities respectively representing whether or not an interruption with a respective real interruption priority is generated;

a mask register for holding mask signals for respective real interruption priorities respectively representing whether or not an interruption with a respective real interruption priority is to be accepted;

a PSW register for including an I/O mask and

determiniation means connected to said dedication status register, said interruption pending register, said mask register and said PSW register for determining whether or not an interruption represented as generated by said interruption pending register is to be accepted by the running operating system.

12. An interruption circuit according to claim 11,

wherein one of the mask signals for a first real interruption priority dedicated to the running operating system has a value equal to a mask signal designated by the running operating system for a virtual interruption priority corresponding to the real interruption priority;

wherein one of the mask signals for a second real interruption priority dedicated to a non-running operating system has a value equal to a logical product of an I/O mask included in a program status word for the non-running operating system and a mask signal designated thereby for a virtual interruption priority corresponding to the real interruption priority; and

wherein mask signals for real interruption priorities other than the first and second ones have a value for acceptance of an interruption of a respective real interruption priority.