Current sense amplifier with low, nonlinear input impedance and high degree of signal amplification linearity
First Claim
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1. A current sense amplifier having first and second input terminals and first and second output terminals, comprising in combination:
- (a) a bias voltage circuit for producing a bias voltage;
(b) a first transistor having a base connected to receive the bias voltage, a collector coupled to the first output terminal, and an emitter coupled to the first input terminal;
(c) a second transistor having a base connected to receive the bias voltage, a collector coupled to the second output terminal, and an emitter coupled to the second input terminal;
(d) first and second load devices coupled to the collectors of the first and second transistors, respectively;
(e) a first current mirror having a control terminal for receiving a first input current from the first input terminal and an output terminal coupled to the second output terminal;
(f) a second current mirror having a control terminal for receiving a second input current from the second input terminal and an output terminal coupled to the first output terminal.
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Abstract
A current sense amplifier includes first and second current mirrors cross-coupled to collectors of first and second transistors having a common base connection to a bias voltage circuit. First and second load devices are connected to the collectors of the first and second transistors, the emitters of which are connected to control transistors of the second and first current mirrors, respectively. The control transistors also receive first and second input currents, respectively. The collectors of the first and second transistors are connected to output terminals of the current sense amplifier.
34 Citations
13 Claims
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1. A current sense amplifier having first and second input terminals and first and second output terminals, comprising in combination:
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(a) a bias voltage circuit for producing a bias voltage; (b) a first transistor having a base connected to receive the bias voltage, a collector coupled to the first output terminal, and an emitter coupled to the first input terminal; (c) a second transistor having a base connected to receive the bias voltage, a collector coupled to the second output terminal, and an emitter coupled to the second input terminal; (d) first and second load devices coupled to the collectors of the first and second transistors, respectively; (e) a first current mirror having a control terminal for receiving a first input current from the first input terminal and an output terminal coupled to the second output terminal; (f) a second current mirror having a control terminal for receiving a second input current from the second input terminal and an output terminal coupled to the first output terminal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A current sense amplifier comprising in combination:
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(a) first and second transistors; (b) first and second current mirror circuits having output conductors cross-coupled to collectors of the first and second transistors, respectively; (c) means for applying a bias voltage to bases of the first and second transistors; (d) first and second load devices connected to the collectors of the first and second transistors, respectively; (e) means for coupling emitters of the first and second transistors to control inputs of the second and first current mirror circuits, respectively.
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11. A method of obtaining low input impedance, high differential gain linearity, and a common mode rejection ratio greater than one, comprising the steps of:
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(a) applying a bias voltage to bases of first and second transistors; (b) forcing first and second input currents into control inputs of first and second current mirror circuits, there being a difference in values of the first and second input currents; (c) conducting first and second currents from emitters of the first and second transistors into the control inputs of the first and second current mirrors, respectively; (d) producing third and fourth currents in outputs of the first and second current mirror circuits, respectively; (e) conducting the first current and the fourth current through a first load device to produce a first output voltage, and conducting the second current and the third current through a second load device to produce a second output voltage. - View Dependent Claims (12, 13)
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Specification