Isolation substrate ring for plasma reactor

• US 4,891,087 A
• Filed: 06/25/1987
• Issued: 01/02/1990
• Est. Priority Date: 10/22/1984
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Whetsel, Joseph E., Stiltz, William J., Johnson, Randall E., Bonifield, Thomas D., Spencer, John E., Davis, Cecil J., Jucha, Rhett B., Jones, John I.
• Primary Examiner(s): Bueker, Richard
• Application Number:
  US07/067,055
• Time in Patent Office: 922 Days
• Field of Search: 118/715, 118/719, 118/723, 427/39, 156/345, 156/643
• US Class Current: 156/345.47
• CPC Class Codes: H01J 37/32532 Electrodes
• CPC Class Codes: H01J 37/32623 Mechanical discharge control means
• CPC Class Codes: H01J 37/32642 Focus rings
• CPC Class Codes: H01J 37/32743 for introducing the material into processing chamber
• CPC Class Codes: Y10S 156/915 Differential etching apparatus including focus ring surrounding a wafer for plasma apparatus

Abstract

A radio frequency (RF) glow discharge plasma etch electrode design is disclosed which is capable of creating high power density plasma with uniform etch rates, while providing access for automatic loading semiconductor wafers from outside of the plasma region. The electrode assembly comprises of an electrode to which RF energy is applied surrounded by an insulator, which in turn surrounded a grounded surface all of which have cylindrical symmetry. When placed a small distance from a flat, grounded substrate, the electrode assembly creates a volume which can effectively combine a high power density plasma, while maintaining a sufficient channel for pumping a gas flow and for observing the plasma optically. The same channel is widened for automatic transport of semiconductor wafers from outside of the plasma reactor chamber. Such confined high power density plasma are important for high rate, uniform, anisotropic etching, especially for silicon dioxide.

Claims

1. A substrate ring assembly for use with a substrate, wherein the substrate is for supporting a semiconductor wafer and for serving as an electrode for a plasma discharge to process the supported semiconductor wafer, comprising:

a floating electrically conducting substrate ring circling the substrate; and

a conductive electrically grounded collimator which rings and is insulated from the first electrode to contain the plasma within a space defined by substrate ring, substrate, collimator and first electrode.

2. The substrate ring assembly of claim 1 wherein the substrate ring is thermally isolated from the substrate by means of a thermal isolation assembly disposed between the substrate ring and the substrate.

3. The substrate ring assembly of claim 1 wherein the first electrode is an RF powered cathode and the substrate is electrically grounded.

4. A plasma reaction discharge assembly for confining a plasma reaction to a restricted space in which a semiconductor wafer may be plasma processed, comprising:

a first electrode;

a substrate opposing the first electrode, wherein the substrate is for supporting a wafer and generating a plasma discharge between the first electrode and the substrate;

an electrically conductive substrate ring disposed around the periphery of the substrate, wherein the substrate ring is for aiding in confining a plasma reaction to the restricted space; and

an electrical isolation assembly for electrically isolating the substrate ring from the substrate; and

a solid electrically grounded electrical conductor disposed about the periphery of, and insulated from, the first electrode for aiding in confining the plasma reaction to the restricted space, wherein the restricted space is the space defined by the grounded electrical conductor, the first electrode, the substrate, and the substrate ring.

5. The plasma reaction discharge assembly of claim 4 wherein the grounded electrical conductor is opposite the substrate ring.

6. The plasma reaction discharge assembly of claim 5 wherein the substrate ring, the grounded electrical conductor, and the first electrode are cylindrically symmetrical about an axis through the center of the first electrode.

7. The plasma reaction discharge assembly of claim 6 wherein the first electrode is an RF powered cathode.

8. A vacuum chamber assembly for plasma processing semiconductor wafers, comprising:

a vacuum chamber containing;

an electrically conductive substrate for supporting a semiconductor wafer and for serving as a first electrode for a plasma discharge; and

an electrically conductive substrate ring encircling the substrate to aid in confining the plasma discharge within a space circumscribed by the substrate ring; and

a second electrode opposing the substrate;

an electrically grounded collimator ring encircles and is electrically isolated from the second electrode, and cooperates with the substrate ring to aid in confining the plasma discharge.

9. The vacuum chamber assembly of claim 8 wherein the substrate ring is electrically isolated from the substrate.

10. The vacuum chamber assembly of claim 9 wherein the collimator ring opposes the substrate ring and forms a gap between the collimator ring and the substrate ring, wherein the gap will not support a plasma.

11. The vacuum chamber assembly of claim 9 wherein the second electrode is an RF cathode.