Direct current motor speed control

• US 4,893,067 A
• Filed: 05/06/1987
• Issued: 01/09/1990
• Est. Priority Date: 05/06/1987
• Status: Expired due to Term

• Current Assignee: Black & Decker Incorporated (Stanley Black & Decker, Inc.)
• Original Assignee: Black & Decker Incorporated (Stanley Black & Decker, Inc.)
• Inventors: Smith, Stephen, Bhagwat, Pradeep, Harrell, Duronie, Woods, Samuel G.
• Primary Examiner(s): Shoop, Jr., William M.
• Assistant Examiner(s): IP, SHIK LUEN PAUL
• Application Number:
  US07/047,181
• Time in Patent Office: 979 Days
• Field of Search: 318/331, 318/599, 388/800-901, 328/151, 307/352, 307/353
• US Class Current: 388/823
• CPC Class Codes: H02P 7/2885 whereby the speed is regulated by measuring the motor speed and comparing it with a given physical value
• CPC Class Codes: Y10S 388/901 Sample and hold

Abstract

The motor speed control circuit senses average back EMF as a measure of motor speed. The back EMF charges a capacitor circuit which accumulates charge and develops a voltage indicative of the motor speed. A sample and hold circuit may be used to sample the back EMF when the motor is switched off during each cycle. This voltage is compared with a reference voltage indicative of the desired motor speed. An error signal is generated by comparing the desired speed with the actual speed and this error signal is used to generate a variable duty cycle pulse train which gates the power controlling transistor on and off to control motor speed. A logic gated or SCR gated voltage boosting circuit operates in synchronism with the gating pulse train to drive the power transistor hard into saturation. This lowers the resistance of the power transistor, causing less energy dissipation as waste heat. The motor speed control circuit produces a family of torque-speed curves which maintain speed constant until a break point is reached, whereupon speed falls inversely proportional to torque. A torque control circuit monitors the motor current and maintains that current at a user selected level to thereby select a desired output torque.

Claims

1. A DC motor speed control circuit comprising:

a DC motor inducing a back EMF;

a sample and hold means coupled to said motor for developing a signal having a 1-χ

relationship to the back EMF of said motor where is χ

the back EMF;

a means for measuring and comparing said developed signal with a predetermined reference signal indicative of the desired motor speed;

a means for producing a gating signal indicative of the relationship of said developed signal to said reference signal;

a gated control means coupled to regulate electrical power to said motor;

said control means being responsive to said gating signal to permit power flow to said motor when said developed signal is at one relationship to said reference signal and to restrict power flow to said motor when said developed signal is at a second relationship to said reference signal.

2. The circuit of claim 1 wherein said sample and hold means is coupled to said means for producing a gating signal and said sample and hold means is gated by said gating signal to sample said back EMF of said motor when said power flow to said motor is restricted and to hold the sampled back EMF when said power flow to said motor is permitted.

3. The circuit of claim 1 wherein said sample and hold means comprises an electronic switching means coupled to said motor and having a gating terminal coupled to said means for producing a gating signal and further comprises energy storage means coupled to said electronic switching means for storing a back EMF signal.

4. The circuit of claim 3 wherein said sample and hold means further comprises buffer amplifier coupled to said energy storage means for coupling to said means for measuring and comparing.

5. A DC motor speed control circuit comprising:

a DC motor inducing a back EMF;

an energy storage means coupled to said motor for developing a signal indicative of the back EMF of said motor;

a means for measuring and comparing said developed signal with a predetermined reference signal indicative of desired motor speed;

a means for producing a first gating signal indicative of the relationship of said developed signal to said reference signal;

a gated control means coupled to regulate electrical power to said motor;

said control means being responsive to said first gating signal to permit power flow to said motor when said developed signal is at one relationship to said reference signal and to restrict power flow to said motor when said developed signal is at a second relationship to said reference signal;

a means for sensing current flow through said motor and for providing a current level signal;

a means for comparing said current level signal to a second predetermined reference signal indicative of desired motor torque;

a means for producing a second gating signal indicative of the relationship of said current level signal to said second reference signal;

said gated control means being responsive to said second gating signal to regulate power flow to said motor in response to said current flow through said motor to thereby control the torque output of said motor.

6. The circuit of claim 5 wherein said energy storage means comprises a capacitor.

7. The circuit of claim 5 wherein said energy storage means comprises a sample and hold means.

8. The circuit of claim 5 wherein said means for sensing current comprises low resistance means in series with said motor and an amplifier coupled to said low resistance means.

9. The circuit of claim 8 wherein said low resistance means has less than 1 Ohm of resistance.

10. The circuit of claim 5 wherein said second gating signal regulates power flow to said motor by limiting current flow through said motor on a cycle by cycle basis is synchronism with said first gating signal.

11. The circuit of claim 5 further comprising latch means responsive to said second gating signal and logic gating means coupled to said latch and receptive of said first gating signal for selectively decoupling said first gating signal in response to said second gating signal.

12. A DC motor speed control circuit comprising:

a DC motor having an operating current and inducing a back EMF;

a sample and hold means coupled to said motor for developing a signal indicative of the back EMF of said motor;

a means for measuring and comparing said developed signal with a predetermined reference signal indicative of desired motor speed;

a capacitor means charged by said operating current of said DC motor for producing a variable frequency gating signal wherein said frequency is indicative of the relationship of said developed signal to said reference signal;

wherein said sample and hold means further comprises buffer amplifier coupled to said energy storage means for coupling to said means for measuring and comparing;

a gated control means coupled to regulate electrical power to said motor;

said control means being responsive to said gating signal to permit power flow to said motor when said developed signal is at one relationship to said reference signal and to restrict power flow to said motor when said developed signal is at a second relationship to said reference signal.

13. The circuit of claim 12 wherein said sample and hold means is coupled to said means for producing a gating signal and said sample and hold means is gated by said gating signal to sample said back EMF of said motor when said power flow to said motor is restricted and to hold the sampled back EMF when said power flow to said motor is permitted.

14. The circuit of claim 12 wherein said sample and hold means comprises an electronic switching means coupled to said motor and having a gating terminal coupled to said means for producing a gating signal and further comprises energy storage means coupled to said electronic switching means for storing a back EMF signal.