Semiconductor device with no stress generated at the trench corner portion and the method for making the same

• US 4,894,695 A
• Filed: 03/17/1988
• Issued: 01/16/1990
• Est. Priority Date: 03/23/1987
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Ishii, Tatsuya, Okumura, Yoshinori, Nagatomo, Masao
• Primary Examiner(s): Hille, Rolf
• Assistant Examiner(s): Limanek, Robert P.
• Application Number:
  US07/169,062
• Time in Patent Office: 670 Days
• Field of Search: 357/23.6, 357/55, 437/67
• US Class Current: 257/301
• CPC Class Codes: H01L 29/66181 Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
• CPC Class Codes: H10B 12/038 the capacitor being in a trench in the substrate
• CPC Class Codes: H10B 12/37 the capacitor being at least partially in a trench in the substrate
• CPC Class Codes: Y10S 257/911 Light sensitive array adapted to be scanned by electron beam, e.g. vidicon device

Abstract

The semiconductor device in which no stress occurs at the corner portion of the trench comprises a p type semiconductor substrate having a trench and a main surface, a thick insulating film formed on the bottom portion of the trench, a thin insulating film formed on the sidewall portion of the trench and connected to the end portion of the thick insulating film, and an n type impurity region formed in the semiconductor substrate only on the side portion of the thin insulating film.

Claims

1. A semiconductor device comprising:

a semiconductor substrate having a main surface, a prescribed impurity concentration of a first conductivity type and a trench;

a thick insulating film formed on either a bottom portion or a sidewall portion of said trench, an end portion of said thick insulating film extending in either a vertical upward direction when said thick insulating film is formed on the bottom portion or a horizontal direction when the thick insulating film is formed on the sidewall portion;

a thin insulating film extending in the direction orthogonal to said thick insulating film and connected to the end portion of said thick insulating film; and

a first impurity region of a second conductivity type formed in said semiconductor substrate on either the sidewall portion or the bottom portion and the sidewall portion of said trench on which said thick insulating film is not formed, only in the side portion or lower portion of said thin insulating film, said thick insulating film is formed by

forming a two-layer film constituted by an oxide film and a nitride film on the main surface of said semiconductor substrate, side portions and a portion of the bottom portion of the trench, and

forming a selective oxide film to form said thick insulating film on the bottom portion of the trench of said semiconductor substrate by oxidizing said semiconductor substrate with said two-layer film formed thereon, whereby

the direction of extension of the end portion of said selective oxide film changing from horizontal to vertical upward with a large curvature.

2. A semiconductor device according to claim 1, wherein

said first impurity region of the second conductivity type extends to the main surface of said semiconductor substrate along the sidewall of the trench, which further comprises:

a second impurity region of the second conductivity type formed on a prescribed position on the main surface of said semiconductor substrate and connected to said first impurity region of the second conductivity type;

a first conductive layer formed on said second impurity region of the second conductivity type and on said first impurity region of the second conductivity type with an insulating film interposed therebetween;

a third impurity region of the second conductivity type formed on the main surface of said semiconductor substrate spaced apart from said second impurity region of the second conductivity type; and

a second conductive layer formed on that portion of said semiconductor substrate which is sandwiched between said second impurity region of the second conductivity type and said third impurity region of the second conductivity type with an insulating film interpose therebetween.

3. A semiconductor device according to claim 2, wherein said first impurity region of the second conductivity type, said second impurity region of the second conductivity type, said first conductive layer and the insulating film interposed therebetween constitute a capacitor of a memory cell.

4. A semiconductor device according to claim 2, wherein said second impurity region of the second conductivity type, said third impurity region of the second conductivity type and said second conductive layer constitute a field effect device.

5. A semiconductor device according to claim 4, wherein said field effect device comprises a field effect transistor.

6. A semiconductor device according to claim 5, wherein said semiconductor device comprises a semiconductor memory device.

7. A semiconductor device according to claim 1, wherein

said thick insulating film is formed on the bottom portion of said trench,

said thin insulating film is formed on both sidewall portions of said trench,

said first impurity region of the second conductivity type is formed on both sidewall portions of said trench, said device further comprising:

second impurity regions of the second conductivity type formed on a prescribed position of the main surface of said semiconductor substrate and connected to said first impurity regions of the second conductivity type;

first conductive layers formed on said second impurity regions of the second conductivity type and on said first impurity regions of the second conductivity type with insulating films interposed therebetween;

third impurity regions of the second conductivity type formed on the main surface of said semiconductor substrate spaced apart from said second impurity regions of the second conductivity type; and

second conductive layers formed on that portion on the main surface of said semiconductor substrate which are sandwiched between said second impurity regions of the second conductivity type and said third impurity region of the second conductivity type;

whereby

said thick insulating film constitutes a region for isolation between devices.

8. A semiconductor device according to claim 7, wherein said first impurity region of the second conductivity type, said second impurity region of the second conductivity type, said first conductive layer and the insulating film interposed therebetween constitute a capacitor of a memory cell.

9. A semiconductor device according to claim 7, wherein said second impurity region of the second conductivity type, said third impurity region of the second conductivity type and said second conductive layer constitute a field effect device.

10. A semiconductor device according to claim 9, wherein said field effect device comprises a field effect transistor.

11. A semiconductor device according to claim 10, wherein said semiconductor device comprises a semiconductor memory device.

12. The semiconductor device according to claim 1, wherein said trench bottom portion is joined to the trench sidewall portion by continuously curvilinear corner portions on which is formed the thick insulating film, said end portion thereby having rounded surfaces where it contacts said continuously curvilinear portions, an inner surface of said insulating film within the trench also having rounded surfaces proximate the end portion to thereby minimize stress in the end portion by preventing distortion of the crystal lattice within the end portion.

13. The semiconductor device according to claim 12, wherein the width of said trench is less than 1uand the radius curvature of said corner portion is more than 1/10 and less than 1/2 of the width of said trench.

14. A semiconductor device comprising:

a semiconductor substrate having a main surface, a prescribed impurity concentration of a first conductivity type and a trench;

a thick insulating film formed on either a bottom portion or a sidewall portion of said trench, and an end portion of said thick insulating film extending in either a vertical upward direction when said thick insulating film is formed on the bottom portion or a horizontal direction when the thick insulating film is formed on the sidewall portion;

a thin insulating film extending in the direction orthogonal to said thick insulating film and connected to the end portion of said thick insulating film; and

a first impurity region of a second conductivity type formed in said semiconductor substrate on either the sidewall portion or the bottom portion and the sidewall portion of said trench on which said thick insulating film is not formed, only in the side portion or lower portion of said thin insulating film, said thick insulating film is formed by;

forming a two-layer film constituted by an oxide film and a nitride film on the main surface of said semiconductor substrate and on that region of the sidewall portion of said trench other than the regions adjacent to the bottom portion of said trench,

forming a selective oxide film to form said thick insulating film on the bottom portion of the trench of said semiconductor substrate by oxidizing said semiconductor substrate with said two-layer film formed thereon with the bottom portion of said trench and the regions of the sidewall portion of said trench adjacent to said bottom portion being exposed, whereby

an end portion of said selective oxide film extending only in the vertical upward direction.