Protective power controller

• US 4,896,254 A
• Filed: 04/28/1989
• Issued: 01/23/1990
• Est. Priority Date: 04/28/1989
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Honeywell Incorporated (Honeywell International Inc.)
• Inventors: Bennett, Robert M.
• Primary Examiner(s): Wong, Peter S.
• Application Number:
  US07/345,143
• Time in Patent Office: 270 Days
• Field of Search: 363/50, 363/65, 363/78, 363/79, 323/267, 323/313, 323/315, 323/316, 323/907, 307/18, 307/24, 307/29, 307/38, 307/39, 307/82, 307/85, 307/86, 361/87, 361/93, 361/94, 361/103, 340/584, 340/588, 340/657, 340/664
• US Class Current: 363/50
• CPC Class Codes: H02H 3/06 with automatic reconnection
• CPC Class Codes: H02H 3/087 for dc applications
• CPC Class Codes: H03K 17/666 the output circuit comprising more than one controlled bipolar transistor

Abstract

A power controller system for providing electrical power to a multiplicity of loads at outputs thereof under direction of a plurality of input controllers operating a corresponding plurality of output energization means with the controllers capable of having different output states in response to differnt system input signals, the controller having selected common components for forcing selected ones of said input controllers to terminate power to corresponding loads. Current sensing means upsetting current balances in bipolar transistors are used to sense beyond-limit currents.

Claims

1. A protective multiple output power controller for supplying ranges of currents within selected limits at those of a plurality of outputs thereof to which corresponding loads are electrically connected to result in selected voltages occurring thereacross, said power controller comprising:

a plurality of input controllers each having a first output region and each having a control input region and a cessation input region, said plurality of input controllers each being capable of having its said first output region in a first state for a first control state occurring at its said control input region and a first cessation signal value on its said cessation input region, and having its said first output region in a second state for a second control state occurring at its said control input region with said first cessation signal value on its said cessation input region, and of having its said first output region in said second state if a second cessation signal value occurs on its said cessation input region;

a first plurality of output energization means each having first and second current pass regions and having a control region therein by which it is capable of being directed, through electrical energization thereof, to effectively provide a conductive path between its said first and second current pass regions, said control region of each of said first plurality of output energization means being electrically connected to a said first output region of a corresponding one of said plurality of input controllers, said first and second current pass regions of each of said first plurality of output energization means having a selected one thereof serving as one of said power controller outputs and with that one thereof remaining being electrically connected to a first terminal means adapted for electrical connection to a first supply of electrical energization;

a first plurality of current sensing means each having an output region and each being capable of sensing currents flowing through at least one of said first and second current pass regions of a corresponding one of said first plurality of output energization means, and of providing a selected logic state on said output region thereof if a current being sensed thereby is beyond a selected threshold value;

a plurality of resettable memory means each having an output region and both a setting input region and a resetting input region such that one logic state occurs on its said output region if a selected logic state occurs on its said setting input region but that an opposite logic state occurs on its said output region if a selected logic state occurs on its said resetting input region, said setting input region of each of said plurality of memory means being electrically connected to a said output region of a corresponding one of said first plurality of sensing means;

a power removal timer means having an initiation input region and an output region, said power removal timer means being capable of having a selected signal occur on its said output region at a selected time duration after a selected signal occurs on said power removal timer means initiation input region, said power removal timer means output region being electrically connected to said resetting input region of each of said plurality of resettable memory means;

a first coupling means having an output region and a plurality of input regions, said first coupling means being capable of having a selected signal occur on its output region after a selected signal occurs on any one of its said plurality of input regions, said first coupling means output region being electrically connected to said power removal timer means initiation input region and said first coupling means plurality of input regions each being electrically connected to a said output region of a corresponding one of said first plurality of sensing means; and

a plurality of second coupling means each having an output region and a pair of input regions, said plurality of said coupling means each being capable of having a signal occur on its said output region after selected signals occur concurrently on both of its said, pair of input regions, said plurality of second coupling means each having its output region electrically connected to a said cessation input region of a corresponding one of said plurality of input controllers, said plurality of second coupling means each having one of its said pair of input regions electrically connected to a said output region of a corresponding one of said plurality of resettable memory means and having that input region thereof remaining electrically connected to said output region of said power removal timer means.

2. The apparatus of claim 1 wherein each of said plurality of input controllers has also a second output region, said plurality of input controllers each also being capable of having its said second output region in a first state for a third control state occurring at its said control input region with said first cessation signal value on its said cessation input region, and having its said second output region in a second state for said second control state occurring at its said control input region with said first cessation signal on its said cessation input region, and of having its said second output region in said second state if said second cessation signal value occurs on its said cessation input region;

and wherein said apparatus further comprises a second plurality of output energization means each having first and second current pass regions and having a control region therein by which it is capable of being directed, through electrical energization thereof, to effectively provide a conductive path between its said first and second current pass regions, said control region of each of said second plurality of output energization means being electrically connected to a said second output region of a corresponding one of said plurality of input controllers, said first and second current pass regions of each of said second plurality of output energization means having a selected one thereof electrically connected to that one of said power source outputs which is formed by a said output region of that one of said first plurality output energization means electrically connected to a common one of said input controllers, and with that said current pass region thereof remaining being electrically connected to a second terminal means adapted for electrical connection to a second supply of electrical energization.

4. The apparatus of claim 1 further comprising a temperature sensing means having a first output region, said temperature sensing means being capable of sensing selected temperatures occurring in that structural arrangement in which said power controller is implemented and of providing an output signal at its said first output region if such temperatures exceed a corresponding selected threshold, said temperature sensing means first output region being electrically connected in said power controller so that said temperature sensing means, in supplying an output signal if a temperature sensed thereby goes beyond a said threshold, is capable of causing all of said plurality of input controllers to have said output regions thereof in said second state.

5. The apparatus of claim 1 wherein said first coupling means comprises a logic gate which performs the OR logic function.

8. The apparatus of claim 1 wherein said first plurality of output energization means each comprises a transistor-based circuit means so that one of said first and second current pass regions thereof serving as a said power controller output, if that said first output region of a said input controller to which that said output energization means is electrically connected as aforesaid is in said second state, represents an impedance sufficiently great to prevent any significant electrical current flow through a load connected between such a said power controller output and a point having a voltage occurring thereon less in absolute value than that appearing on said first terminal means.

9. The apparatus of claim 1 wherein said power removal timer has a further external control input region, said power removal timer being capable of having said selected signal prevented from occurring on its said output region if a selected signal is provided on its said external control input region despite any signals occurring on its said initiation input region.

10. The apparatus of claim 2 wherein there is further provided a second plurality of current sensing means each having an output region and each capable of sensing currents flowing through at least one of said first and second pass regions of a corresponing one of said second plurality of output energization means, and of providing a selected logic state on said output region thereof if a current being sensed thereby is beyond a selected threshold value;

and wherein there is further provided a plurality of third coupling means each having an output region and a plurality of input regions, said plurality of third coupling means each being capable of having a selected signal occur on its output region after a selected signal occurs on any one of its said plurality of input regions, said plurality of third coupling means each having one input thereof electrically connected to a corresponding one of said first plurality of current sensing means output regions and another input thereof electrically connected to said output region of that one of said second plurality of current sensing means electrically connected in common to a said input controller with that one of said first plurality of current sensing means so connected, said setting input region of each of said plurality of memory means being electrically connected to a corresponding one of said first plurality of sensing means output regions, as aforesaid, by being electrically connected to said output region of that said third coupling means electrically connected to that said current sensing means output region, and said input region of said first coupling means being electrically connected to said output region of a corresponding one of said first plurality of current sensing means, as aforesaid, by being electrically connected to said output region of that said third coupling means electrically connected to that said current sensing means output region.

11. The apparatus of claim 4 wherein said power removal timer means has a further temperature control input region, said power removal timer means being capable of having selected signals prevented from occurring on its said output region if a selected signal is provided on its said temperature control region despite any signals occurring on its said initiation input region and despite any signals occurring on its said external control input region, said temperature sensing means first output region being electrically connected to said power removal timer means temperature control input region.

12. The apparatus of claim 8 wherein said transistor-based circuit means is based on bipolar transistors and said first plurality of output energization means have any circuit paths which extend between said first terminal means through a bipolar transistor base region and emitter region to said power controller output also extend through a collector region of a further bipolar transistor.

13. The apparatus of claim 10 wherein there is further provided a plurality of delay timer means each having an input region and an output region, said plurality of delay timer means each being capable of having a selected signal occur on its said output region at a selected time duration after a selected signal occurs on its input region, said plurality of delay timer means each having its input region electrically connected to said output region of a corresponding one of said plurality of third coupling means, said setting input region of each of said plurality of memory means being electrically connected to said output region of a corresponding one of said plurality of third coupling means, as aforesaid, by being electrically connected to said output region of that said delay timer means electrically connected to that said third coupling means output region, and said input region of said first coupling means being electrically connected to said output region of a corresponding one of said plurality of third coupling means, as aforesaid, by being electrically connected to said output region of that said delay timer means electrically connected to that said third coupling means.

14. The apparatus of claim 10 further comprising a temperature sensing means having a first output region and a second output region, said temperature sensing means being capable of sensing selected temperatures occurring in that structural arrangement in which said power controller is implemented and of providing an output signal at its said first and second output regions if such temperatures exceed a corresponding selected threshold, said temperature sensing means first and second output regions being electrically connected in said power controller so that said temperature sensing means, in supplying an output signal if a temperature sensed thereby goes beyond a said threshold, is capable of causing all of said plurality of input controllers to have said output regions thereof in said second state and of providing an indication of this condition.

15. The apparatus of claim 10 wherein said first coupling means comprises a logic gate which performs the OR logic function.

16. The apparatus of claim 10 wherein said plurality of second coupling means each comprises a logic gate which performs the AND logic function.

17. The apparatus of claim 10 wherein said plurality of third coupling means each comprises a logic gate which performs the OR logic function.

18. The apparatus of claim 10 wherein said plurality of resettable memory means each comprises a R-S flip-flop.

19. The apparatus of claim 10 wherein said first plurality of output energization means each comprises a transistor-based circuit means so that one of said first and second current pass regions thereof serving as a said power controller output, if that said first output region of a said input controller to which that said output energization means is electrically connected as aforesaid is in said second state, represents an impedance sufficiently great to prevent any significant electrical current flow through a load connected between such a said power controller output and a point having a voltage occurring thereon less in absolute value than that appearing on said first terminal means.

20. The apparatus of claim 10 wherein said power removal timer has a further external control input region, said power removal timer being capable of having said selected signal prevented from occurring on its said output region if a selected signal is provided on its said external control input region despite any signals occurring on its said initiation input region.

21. The apparatus of claim 14 wherein said power removal timer means has a further temperature control input region, said power removal timer means being capable of having selected signals prevented from occurring on its said output region if a selected signal is provided on its said temperature control region despite any signals occurring on its said initiation input region and despite any signals occurring on its said external control input region, said temperature sensing means first output region being electrically connected to said power removal timer means temperature control input region.

22. The apparatus of claim 18 wherein said transistor-based circuit means is based on bipolar transistors and said first plurality of output energization means have any circuit paths which extend between said first terminal means through a bipolar transistor base region and emitter region to said power controller output also extend through a collector region of a further bipolar transistor.

23. The apparatus of claim 21 wherein an input of each of said plurality of third coupling means is electrically connected to said temperature sensing means second output region.

3. The apparatus of claim wherein there is further provided a plurality of delay timer means each having an input region and an output region, said plurality of delay timer means each being capable of having a signal occur on its said output region at a selected time duration after a selected signal occurs on its input region, said plurality of delay timer means each having its input region electrically connected to said output region of a corresponding one of said first plurality of current sensing means, said setting input region of each of said plurality of memory means being electrically connected to said output region of a corresponding one of said first plurality of current sensing means, as aforesaid, by being electrically connected to said output region of that said delay timer means electrically connected to that said current sensing means output region, and said input region of said first coupling means being electrically connected to said output region of a corresponding one of said first plurality of current sensing means, as aforesaid, by being electrically connected to said output region of that said delay timer means electrically connected to that said current sensing means output region.

6. The apparatus of claim wherein said plurality of second coupling means each comprises a logic gate which performs the AND logic function.

7. The apparatus of claim wherein said plurality of resettable memory means each comprises a R-S flip-flop.

24. A voltage limit indicator for providing an output signal at an output thereof if a monitored voltage provided at a selected input thereof goes beyond a selected limit, said voltage limit indicator comprising:

a pair of initial bipolar transistors substantially matched to one another, including first and second initial bipolar transistors, said pair of initial bipolar transistors having base regions of each directly electrically connected together and having emitter regions of each electrically connected to a first terminal means adapted for electrical connection to a first source of electrical energization, said first initial bipolar transistor having its base region electrically connected to its collector region;

a pair of complementary bipolar transistors each of which is of a type complementary to that of said first and second initial bipolar transistors, including first and second complementary bipolar transistors, said first complementary bipolar transistor being substantially matched to said second complementary bipolar transistor except for said second complementary bipolar transistor having an emitter area which is a selected fraction of that of said first complementary bipolar transistor, said pair of complementary bipolar transistors having base regions of each directly electrically connected together and each emitter regions of each electrically connected to a second terminal means adapted for electrical connection to a second source of electrical energization, said first complementary bipolar transistor having its base region electrically connected to its collector region, said first initial and first complementary bipolar transistors having collector regions of each electrically connected to one another, there being a selected one as said first complementary bipolar transistor and said second initial bipolar transistor emitter regions electrically connected to its corresponding one of said first and second terminal means through a source of said monitored voltage; and

an output bipolar transistor having its base region electrically connected to each of said second initial and second complementary bipolar transistor base regions, and having its emitter and base regions electrically connected to said first and second terminal means, respectively.

25. The apparatus of claim 24 wherein said voltage monitor source is electrically connected between said first terminal means and said second initial bipolar transistor emitter region, and which further comprises a diode means electrically connected between said second terminal means and said first and second complementary bipolar transistor emitter regions with its anode connected to such emitter regions, and which further yet comprises a reference bipolar transistor having its base region connected to a cathode region of said diode means, and having its emitter and collector regions electrically connected between said output bipolar transistor emitter region and said second terminal means with its emitter region connected through a load means to said output bipolar transistor emitter region.

26. The apparatus of claim 24 wherein said monitored voltage source is electrically connected between said first complementary bipolar transistor emitter region and said second terminal means, and said output bipolar transistor emitter region is electrically connected through a load means to said second terminal means.