Signal processing device with a level adapter circuit

• US 4,897,599 A
• Filed: 11/28/1986
• Issued: 01/30/1990
• Est. Priority Date: 03/27/1985
• Status: Expired due to Fees

• Current Assignee: Kontron Elektronik GmbH (XTECH Embedded Computers)
• Original Assignee: Createc Gesellschaft Fur Elektrotechnik mbH
• Inventors: Koslar, Manfred
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): Burns, W.
• Application Number:
  US06/945,958
• Time in Patent Office: 1,159 Days
• Field of Search: 307/490, 324/115, 324/116, 324/119, 324/121 R, 324/123 R, 324/130, 324/73 R, 324/74, 364/571, 330/9, 328/127, 328/128, 328/162, 328/163
• US Class Current: 324/115
• CPC Class Codes: G01R 15/08 Circuits for altering the measuring range
• CPC Class Codes: G01R 15/12 Circuits for multi-testers , i.e. multimeters, e.g. for measuring voltage, current, or impedance at will

Abstract

A signal processing device having a level adapter circuit, in particular a broad band oscilloscope, having an operational amplifier with an amplification factor determined by the ratio of a first resistor between the signal input and the inverting input of the operational amplifier--the virtual ground--and a second resistor between the inverting input of the operational amplifier and the signal output, in which the resistors may optionally be complex, in which at least one parallel resistor is provided for the first resistor, the first terminal of which is firmly connected to the signal input or a connecting point of a plurality of partial resistors forming the first resistor, and the second terminal of which can be switched over between the inverting input of the operational amplifier, which input forms the virtual ground, and the real reference potential for the amplifier input.

Claims

1. An attenuator for a signal processing device including an operational amplifier having a signal input terminal, an inverting virtual reference potential input terminal, a signal output terminal and a system reference potential terminal, the amplification factor of said operational amplifier being determined by the ratio of first and second impedances, said first impedance disposed between said signal input terminal and said inverting virtual reference potential input terminal of said operational amplifier, said inverting virtual reference potential input terminal operating as a virtual reference voltage terminal and said second impedance disposed between said inverting input terminal of said operational amplifier and said signal output terminal thereof,

said first impedance comprising at least two resistors, each said resistor having first and second terminals, said first terminals being connected together and to said inverting virtual reference potential input terminal and

switch means to couple selected ones of said second terminals of said resistors to said system reference potential terminal.

2. An attenuator as defined by claim 1, further including a fixed resistor connected in series between said signal input and said first impedance, and a connection in parallel with said first impedance for varying said first impedance.

3. An attenuator as defined by claim 1, further including one of a mechanical or electromechanical switch for effecting said switching.

4. An attenuator as defined by claim 1, wherein said means to switch is an integrated analog switch.

5. An attenuator as defined by claim 1, wherein said impedance elements have capacitive components embodied by at least one trimming capacitor.

6. An attenuator as defined by claim 1, wherein said level adapter circuit comprises two successive stages, each said stage containing one said operational amplifier with said switchable impedance elements, the first of said stages having a high-impedance calibration divider.

7. An attenuator as defined by claim 1, wherein the impedance values of said impedances are dimensioned to generate decade-type level adaptation jumps by switching a said impedance for one of connection with or disconnection from among said impedances determining the foregoing level adaptation.

8. An input circuit for a signal processing device having an attenuator as defined by claim 1, said circuit having a transmission window, further including means to supply at least one of a compensation current for direct voltage shifting or for correction of individual amplitude values within said transmission window via said virtual reference potential input terminal as a summing point of the amplifier.

9. An input circuit as defined by claim 8, further including a current divider having variable switchable branches, wherein said summing point being identical to the point where said current divider is joined together for level adaptation, the variable branches of said current divider being switched between said summing point and the voltage at said system reference terminal.

10. An input circuit as defined by claim 8, further including means to feedback a digital signal dependent on the signal at the output of the amplifier, wherein said means to supply is effected by said feedback, and means to convert said digital signal to an analog signal.

11. An input circuit as defined by claim 8, further including a memory having a digital signal stored therein for effecting generation of a signal to be fed back and a digital signal associated with the deviation of the analog output signal of said amplifier from a predetermined analog signal at a likewise predetermined analog input signal for providing said signal to be fed back.

12. An input circuit as defined by claim 11, further including means to feedback various signals distributed in terms of amplitude over the intended transmission range to effect calibration of the amplifier.

13. An input circuit as defined by claim 8, further including a memory for storing therein a digital value representative of the signal that is to be fed back and means to derive the signal that is to be fed back from the stored digital value by means of digital/analog conversion.

14. An input circuit as defined by claim 13, further including means to address by table the digital values stored in the memory in accordance with various input signal amplitudes which encompass the intended input signal range.

15. An input circuit as defined by claim 8, further including a memory addressed at least indirectly by means of a digitized measured value, the value contained in the addressed memory representing one of a correction or correcting value, and digital/analog converter means to supply said value to said summing point.

16. An input circuit as defined by claim 8, further including means including memory means to provide a signal identifying the selected measurement ranges for calibration, wherein the digital values ascertained for different measurement ranges are stored in said memory means.

17. An input circuit as defined by claim 8, further including a multi-stage amplifier coupled to the input of one of the amplifier stages to effect feedback.