Semiconductor wafer array
First Claim
Patent Images
1. A wafer array comprising:
- a plurality of wafers of material which are disposed in a stack one on top of another;
a through-hole in each of said wafers in said stack, said through-hole having an apex at one surface of said wafer and a base at the opposite surface of said wafer with an outwardly sloping sidewall extending from said apex to said base.first retaining means for retaining said through-hole in one of said wafers in said stack in registration with said through-hole in an adjacent wafer in said stack;
an electrically conductive pad located adjacent to said apex of said through-hole in each of said wafers, said base of said through-hole being large enough to extend over the electrically conductive pad located adjacent to said apex of a through-hole in registration therewith on an adjacent wafer;
an electrically conductive liquid which extends through said through-hole in each of said wafers for electrically connecting said electrically conductive pad on one of said wafers with said electrically conductive pad on said adjacent wafer;
means for electrically isolating said electrically conductive liquid from exposed surfaces of said wafer material; and
second and third retaining means located on the top and bottom of said stack, respectively for retaining said electrically conductive liquid in said through-holes, said third retaining means including means for electrically connecting said electrically conductive liquid to an external device.
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Abstract
A wafer array comprising a plurality of wafers of semiconductor material are stacked one on top of another. Through holes are provided in the wafers and electrically conductive liquid is inserted in the through holes for interconnecting all of the wafers. The conductive liquid is electrically insulated from all parts of the wafers except a part comprising an electrically conductive bonding pad which provides an electrical path between the conductive liquid and transistors located in the wafers. The wafers, which are disposed in a stack one on top of the other, are mounted in an enclosure and coupled to electrical pin members for connection to external devices.
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Citations
16 Claims
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1. A wafer array comprising:
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a plurality of wafers of material which are disposed in a stack one on top of another; a through-hole in each of said wafers in said stack, said through-hole having an apex at one surface of said wafer and a base at the opposite surface of said wafer with an outwardly sloping sidewall extending from said apex to said base. first retaining means for retaining said through-hole in one of said wafers in said stack in registration with said through-hole in an adjacent wafer in said stack; an electrically conductive pad located adjacent to said apex of said through-hole in each of said wafers, said base of said through-hole being large enough to extend over the electrically conductive pad located adjacent to said apex of a through-hole in registration therewith on an adjacent wafer; an electrically conductive liquid which extends through said through-hole in each of said wafers for electrically connecting said electrically conductive pad on one of said wafers with said electrically conductive pad on said adjacent wafer; means for electrically isolating said electrically conductive liquid from exposed surfaces of said wafer material; and second and third retaining means located on the top and bottom of said stack, respectively for retaining said electrically conductive liquid in said through-holes, said third retaining means including means for electrically connecting said electrically conductive liquid to an external device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A wafer array comprising:
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a stack of wafers of semiconductor material, each of said wafers having transistor means located therein and a through-hole extending through said wafer, said through-hole having an apex at one surface of said wafer and a base at the opposite surface of said wafer with an outwardly sloping sidewall extending from said apex to said base; an electrically conductive pad located adjacent to said apex of said through-hole in each of said wafers, said base of said through-hole being large enough to extend over the electrically conductive pad located adjacent to said apex of a through-hole in registration therewith on an adjacent wafer, said electrically conductive pad on each of said wafers being electrically connected to said transistor means located therein; and means, including an electrically conductive liquid which extends through the through-hole in each of said wafers in said stack, for electrically interconnecting said electrically conductive pads adjacent to said through-holes in registration on all of said wafers. - View Dependent Claims (12, 13, 14, 15)
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16. A method of making a wafer array comprising the steps of:
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providing a plurality of wafers, each of said wafers having an electrically conductive pad located on at least one surface thereof; coating said pad and the surface of said wafer surrounding said pad with a protective layer of material; providing a through-hole which extends through said protective layer of material, said pad and the wafer beneath said pad, said protective layer providing protection for the underlying wafer surface during said step of providing said through-hole; coating both sides of said wafer, said first protective layer and the walls of said through-hole with an electrically non-conductive layer; removing said protective layer and said electrically non-conductive layer covering said pad and said surface of said wafer surrounding said pad; coating at least one surface of each of said wafers with a non-electrically conductive adhesive for bonding one wafer to another after they have been placed in a stacked relationship; stacking said plurality of wafers one on top of another in such a manner that said through-hole in each of said wafers is in registration with said through-hole in the wafers adjacent thereto and said pad and the surfaces of said through-hole are kept free of said adhesive; attaching one end of the stacked wafers to an interconnection wafer, said interconnection wafer having an electrically conductive trace which extends from an exterior pad in registration with said through-holes to an exterior pad near the periphery thereof; placing a supply of electrically conductive liquid on the opposite end of said stack over said through-holes; placing said stack with said interconnection wafer and said supply of electrically conductive liquid in a vacuum chamber; evacuating said chamber so as to evacuate said through-holes; allowing said chamber to recover to atmospheric pressure after said through-holes have been evacuated so as to cause said electrically conductive liquid to migrate into said evacuated through-holes; covering said stack with a material for retaining said electrically conductive liquid in said through-holes; mounting said stack in a case on a layer of compliant material; and attaching said external pad on said periphery of said interconnection wafer to an electrical pin member which extends through a wall of said case for providing a means for electrically connecting said stack to an external device.
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Specification