Peer-to-peer register exchange controller for PLCS

• US 4,897,777 A
• Filed: 04/11/1988
• Issued: 01/30/1990
• Est. Priority Date: 04/11/1988
• Status: Expired

• Current Assignee: Schneider Automation Incorporated (Schneider Electric SE)
• Original Assignee: Square D Company (Schneider Electric SE)
• Inventors: Janke, Donald R., Gates, Dirk I., Watt, Kim J.
• Primary Examiner(s): Ruggiero, Joseph
• Application Number:
  US07/179,674
• Time in Patent Office: 659 Days
• Field of Search: 364/131-136, 364/140-147, 364/200 MS File, 364/900 MS File
• US Class Current: 700/5
• CPC Class Codes: G05B 19/052 Linking several PLC's
• CPC Class Codes: G05B 2219/1132 High speed bus between plc and plc or programming device
• CPC Class Codes: G05B 2219/1159 Image table, memory
• CPC Class Codes: G05B 2219/1208 Communication, exchange of control, I-O data between different plc,

Abstract

A communication network for programmable logic controllers (PLCs) wherein selected memory means of each PLC have at least two ports directly accessible by other PLCs and certain registers of the PLCs are identical to enable efficient, high-speed transfer of blocks of data between the PLCs.

Claims

1. A peer-to-peer communications network for high speed transfer of data between devices comprising in combination:

a communications network;

at least two programmable logic controllers (PLC'"'"'s) connected to communicate with said network, each of said PLC'"'"'s including a control processor for sequentially performing a series of instructions, a multi-port image memory coupled between said control processor and said communications network and having a plurality of blocks, a first one of said plurality of blocks corresponding to its respective one of said PLC'"'"'s, the other of said plurality of blocks corresponding to respective ones of the others of said PLS'"'"'s, an input/output device, means for storing status data representing a status of said input/output device in said first one of said blocks; and

means for transferring said input/output status from each of said first ones of said blocks of said respective multi-port image memories to said respective blocks of said other of said multi-port image memories of said other PLC'"'"'s independent of operation of said control processors.

2. The peer-to-peer communications network of claim 1, wherein each of said multi-port memories comprise registers containing transferable data which is transferable between the others of said multi-port memories.

3. The peer-to-peer communications network of claim 2, wherein each of said blocks includes a plurality of registers and the size of the registers containing data being transferred from one of said multi-port memories to the other of said multi-port memories matches the size of said registers to which they are being transferred.

4. The peer-to-peer communications network of claim 3, wherein each of said registers has an address including a first PLC ID number and a second, mailbox number, and the mailbox numbers of the blocks of registers are identical.

5. The peer-to-peer communications network of claim 1, wherein each of said PLC'"'"'s includes a dedicated communications processor to coordinate the transfer of data between the respective blocks.

6. The peer-to-peer communications network of claim 1, including between 2 to 16 PLC'"'"'.

7. The peer-to-peer communications network of claim 1 wherein each of said plurality of control processors can be selectively connected to a common communication bus.

8. A peer-to-peer communications network for high speed transfer of data comprising:

a communications network;

a first programmable logic controller (PLC) communicatively coupled to said network, said first PLC including a first control processor for sequentially performing a series of instructions, a first input/output device, a first multi-port image memory coupled between said first control processor and said communications network and having a plurality of first memory blocks, a first one of said first memory blocks corresponding to said first PLC, and means for storing status data representing a status of said first input/output device in said first one of said first memory blocks;

a second programmable logic controller (PLC) communicatively coupled to said network, said second PLC including a second control processor for sequentially performing a series of instructions, a second input/output device, a second multi-port image memory coupled between said second control processor and said communications network and having a plurality of second memory blocks, a second one of said second memory blocks corresponding to said second PLC, means for storing status data representing a status of said second input/output device in said first one of said second memory blocks; and

means for transferring said data in said first one of said first memory blocks into said first one of said second memory blocks and for transferring said data in said second one of said second memory blocks into said second one of said first memory blocks independent of operation of said control processors.

9. The peer-to-peer communications network of claim 8, wherein each of said first and second memory blocks includes a plurality of registers, and the size of the registers containing data being transferred from one of said multi-port memories to the other of said multi-port memories matches the size of said registers to which they are being transferred.

10. The peer-to-peer communications network of claim 8 wherein each of said registers has an address including a first, PLC ID number and a second, mailbox number, and the mailbox numbers of the blocks of registers are identical.

11. The peer-to-peer communications network of claim 8, wherein each of said first and second PLC'"'"'s includes a dedicated communications processor to coordinate the transfer of data between the respective blocks.

12. The peer-to-peer communications network of claim 8, including between 2 to 16 PLC'"'"'s.

13. The peer-to-peer communications network of claim 8 wherein each of said first and second control processors can be selectively connected to a common communication bus.