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Semiconductor integrated circuit and manufacturing method therefor

  • US 4,898,839 A
  • Filed: 11/15/1988
  • Issued: 02/06/1990
  • Est. Priority Date: 11/15/1988
  • Status: Expired due to Term
First Claim
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1. A method for manufacturing a semiconductor integrated circuit comprising the steps of:

  • preparing a semiconductor substrate of a first conductivity type;

    forming buried layers of a second conductivity type on prescribed regions of the substrate;

    forming an epitaxial layer of the second conductivity type covering said substrate and said buried layers;

    forming isolation regions of the first conductivity type dividing said epitaxial layer into a plurality of islands and simultaneously forming a lower electrode region of a MIS type capacitor in one of said islands;

    forming a base region of a vertical bipolar transistor by selectively introducing impurities of the first conductivity type into another island;

    covering said epitaxial layer with an oxide layer;

    exposing a portion of said lower electrode region by patterning said oxide layer and depositing thereon a dielectric layer of the MIS type capacitor;

    further patterning said oxide layer and forming an emitter region of the vertical bipolar transistor by selectively diffusing impurities of the second conductivity type; and

    forming an upper electrode of the MIS type capacitor on said dielectric layer and forming electrodes which make ohmic contacts through contact holes provided at desired regions in said oxide layer.

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